@@ -7,13 +7,25 @@
#include <linux/err.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
-#include <linux/mfd/rohm-bd718x7.h>
-#include <linux/mfd/rohm-bd71828.h>
-#include <linux/mfd/rohm-bd70528.h>
+#include <linux/mfd/rohm-generic.h>
#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/regmap.h>
+/* clk control registers */
+/* BD70528 */
+#define BD70528_REG_OUT32K 0x2c
+/* BD71828 */
+#define BD71828_REG_OUT32K 0x4B
+/* BD71837 and BD71847 */
+#define BD718XX_REG_OUT32K 0x2E
+
+/*
+ * BD71837, BD71847, BD70528 and BD71828 all use bit [0] to clk output control
+ */
+#define CLK_OUT_EN_MASK BIT(0)
+
+
struct bd718xx_clk {
struct clk_hw hw;
u8 reg;
@@ -92,15 +104,15 @@ static int bd71837_clk_probe(struct platform_device *pdev)
case ROHM_CHIP_TYPE_BD71837:
case ROHM_CHIP_TYPE_BD71847:
c->reg = BD718XX_REG_OUT32K;
- c->mask = BD718XX_OUT32K_EN;
+ c->mask = CLK_OUT_EN_MASK;
break;
case ROHM_CHIP_TYPE_BD71828:
c->reg = BD71828_REG_OUT32K;
- c->mask = BD71828_OUT32K_EN;
+ c->mask = CLK_OUT_EN_MASK;
break;
case ROHM_CHIP_TYPE_BD70528:
- c->reg = BD70528_REG_CLK_OUT;
- c->mask = BD70528_CLK_OUT_EN_MASK;
+ c->reg = BD70528_REG_OUT32K;
+ c->mask = CLK_OUT_EN_MASK;
break;
default:
dev_err(&pdev->dev, "Unknown clk chip\n");
@@ -89,10 +89,6 @@ struct bd70528_data {
#define BD70528_REG_GPIO3_OUT 0x52
#define BD70528_REG_GPIO4_OUT 0x54
-/* clk control */
-
-#define BD70528_REG_CLK_OUT 0x2c
-
/* RTC */
#define BD70528_REG_RTC_COUNT_H 0x2d
@@ -309,8 +305,6 @@ enum {
#define BD70528_GPIO_IN_STATE_BASE 1
-#define BD70528_CLK_OUT_EN_MASK 0x1
-
/* RTC masks to mask out reserved bits */
#define BD70528_MASK_RTC_SEC 0x7f
@@ -183,9 +183,6 @@ enum {
#define BD71828_REG_CHG_STATE 0x65
#define BD71828_REG_CHG_FULL 0xd2
-/* CLK */
-#define BD71828_REG_OUT32K 0x4B
-
/* LEDs */
#define BD71828_REG_LED_CTRL 0x4A
#define BD71828_MASK_LED_AMBER 0x80
@@ -417,7 +414,6 @@ enum {
#define BD71828_INT_RTC1_MASK 0x2
#define BD71828_INT_RTC2_MASK 0x4
-#define BD71828_OUT32K_EN 0x1
#define BD71828_OUT_TYPE_MASK 0x2
#define BD71828_OUT_TYPE_OPEN_DRAIN 0x0
#define BD71828_OUT_TYPE_CMOS 0x2
@@ -191,12 +191,6 @@ enum {
#define IRQ_ON_REQ 0x02
#define IRQ_STBY_REQ 0x01
-/* BD718XX_REG_OUT32K bits */
-#define BD718XX_OUT32K_EN 0x01
-
-/* BD7183XX gated clock rate */
-#define BD718XX_CLK_RATE 32768
-
/* ROHM BD718XX irqs */
enum {
BD718XX_INT_STBY_REQ,
The clk control on ROHM BD71837, BD71847, BD70528 and BD71828 is really simple. Only one register is accessed. Furthermore no other drivers but the clk driver needs access to those registers. It's a bit of an overkill to include all of the PMIC register information in clk driver. Define clk control register addresses and mask in the clk driver and drop the unnecessary PMIC header includes. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> --- Changes from v2 - new patch. drivers/clk/clk-bd718x7.c | 26 +++++++++++++++++++------- include/linux/mfd/rohm-bd70528.h | 6 ------ include/linux/mfd/rohm-bd71828.h | 4 ---- include/linux/mfd/rohm-bd718x7.h | 6 ------ 4 files changed, 19 insertions(+), 23 deletions(-)