From patchwork Tue May 15 16:23:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913812 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="k0y5+BtU"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40ljZF01myz9s01 for ; Wed, 16 May 2018 02:24:20 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753130AbeEOQXi (ORCPT ); Tue, 15 May 2018 12:23:38 -0400 Received: from mail-yb0-f196.google.com ([209.85.213.196]:33143 "EHLO mail-yb0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753984AbeEOQXe (ORCPT ); Tue, 15 May 2018 12:23:34 -0400 Received: by mail-yb0-f196.google.com with SMTP id y5-v6so261145ybg.0; Tue, 15 May 2018 09:23:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tAo7rXu+mux3L7ze8r9gzOGceOAVFwQmVWVRQkyRRgw=; b=k0y5+BtUBd4IyC+OUFlBlHbTEJAMXU9t1JrQSkv2jLV2/zinkC6BDhiJGy4JIleaYx /Gg89LUcM93QDX1Z9Uo19fdl7QIiBIaiihLXX3vF7CIsIWXz+PnEnb6JmFGEwhPK5PlL d82AFbvJ1IQ4SfmfeDcs2hVK1EqptOEDemTZt49h7+a9ejbg9kVAWH9A6DUN1VVXWnNu 3/vTqQgZBFksmlwpMmztCPk1oka/hdusqDwGBWz91OMP5fM+pAeBaoR1DLpGibaW3+9V DL3lA3RUPL871i8/EDYZR2wHBNq7RYofOh7JkQz2ljs78O8S6nz8/V5txW1Vz7/qebvZ 5dWQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tAo7rXu+mux3L7ze8r9gzOGceOAVFwQmVWVRQkyRRgw=; b=GtQFclDzxc8vnXGB9ZiM2L2te0dGwua17JV6OfPMOWNnhTqKqywf4s+PKMCWhCORc9 +K1W17wTl02Mq6DSSuBktdUdRp9bM0iX7PyiFlOKPiiz0uUPDjnN86uB8rMYEmtH8hWS u0infCte6Q1XzvwRC/pGIbwxBo4MmPnd4MxKNWiiaysrHTLjUxpvwjEGPK6c30PZ8of5 e4NKDu8D+1dW0/RIvlXnl+ZOz27XCWOLGvekv8D6hMPIh4Dw99FU2sCuXTvnKaSc2IEA vCzvrWzsQKdLNVPAcrrzcjKOS99flm8NhflzzH4+Wd08ImrI7PllW7zqRGfcPZ9wgXPb GE1g== X-Gm-Message-State: ALKqPwc8zoiNzpKJqbwZ9wLyDf2Q//rBnOAvILEClJRbk/YJl6fxP33y 7PRSe2SpsmaXYBnyw794Qdk= X-Google-Smtp-Source: AB8JxZoxX7YyuCbRWja+1V8L1LhM/VulAMv20V1tbBOyDJsTuN5r5nG4Qd9EaDWK0/rRfF0rai+J2A== X-Received: by 2002:a25:42c2:: with SMTP id p185-v6mr8991887yba.313.1526401414204; Tue, 15 May 2018 09:23:34 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id t124-v6sm142031ywe.107.2018.05.15.09.23.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 15 May 2018 09:23:33 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v4 6/8] gpio: ws16c48: Utilize for_each_set_clump macro Date: Tue, 15 May 2018 12:23:27 -0400 Message-Id: <639ed637c39c77fe6df26f0b55b930751c5864ca.1526400945.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-ws16c48.c | 66 +++++++++---------------------------- 1 file changed, 16 insertions(+), 50 deletions(-) diff --git a/drivers/gpio/gpio-ws16c48.c b/drivers/gpio/gpio-ws16c48.c index c7028eb0b8e1..625336376b5d 100644 --- a/drivers/gpio/gpio-ws16c48.c +++ b/drivers/gpio/gpio-ws16c48.c @@ -134,42 +134,19 @@ static int ws16c48_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - const unsigned int gpio_reg_size = 8; - size_t i; - const size_t num_ports = chip->ngpio / gpio_reg_size; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + size_t port; + size_t word; + unsigned int offset; + const unsigned int port_size = 8; + const size_t num_ports = chip->ngpio / port_size; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < num_ports; i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ - port_state = inb(ws16c48gpio->base + i); - - /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + for_each_set_clump(port, word, offset, mask, num_ports, port_size) { + port_state = inb(ws16c48gpio->base + port); + bits[word] |= port_state << offset; } return 0; @@ -203,26 +180,19 @@ static void ws16c48_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; + size_t port; + size_t word; + unsigned int offset; + const unsigned int port_size = 8; + const size_t num_ports = chip->ngpio / port_size; unsigned int iomask; unsigned int bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } - - port = i / gpio_reg_size; - + for_each_set_clump(port, word, offset, mask, num_ports, port_size) { /* mask out GPIO configured for input */ - iomask = mask[BIT_WORD(i)] & ~ws16c48gpio->io_state[port]; - bitmask = iomask & bits[BIT_WORD(i)]; + iomask = (mask[word] >> offset) & ~ws16c48gpio->io_state[port]; + bitmask = iomask & (bits[word] >> offset); raw_spin_lock_irqsave(&ws16c48gpio->lock, flags); @@ -232,10 +202,6 @@ static void ws16c48_gpio_set_multiple(struct gpio_chip *chip, outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port); raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } }