From patchwork Mon Mar 20 09:55:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 1758910 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=kJ56kO3M; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Pg98j4hFrz246f for ; Mon, 20 Mar 2023 20:55:33 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229771AbjCTJzb (ORCPT ); Mon, 20 Mar 2023 05:55:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47784 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230161AbjCTJz0 (ORCPT ); Mon, 20 Mar 2023 05:55:26 -0400 Received: from mail-lf1-x136.google.com (mail-lf1-x136.google.com [IPv6:2a00:1450:4864:20::136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C2E561F91B for ; Mon, 20 Mar 2023 02:55:21 -0700 (PDT) Received: by mail-lf1-x136.google.com with SMTP id y15so14112121lfa.7 for ; Mon, 20 Mar 2023 02:55:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679306119; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=EOglr4b8wCIZjowHrmCHalgLUTFsF3VGPj317uHaVFA=; b=kJ56kO3MduhiDK5ybC0WL3qaOzThm6WPK8eMyB1OamVZiJfOcQk0xmXE/zSisFY0dB MppJxQ2gGiT09ZH487ElXsDAGrtQ/ogdwA2zLb0Xrf5q0OObLU48m9uZiBd5rmAoLz19 c87J3IwGn68t/c4poAw7ckPaJz82738fW0ktSIKaoEfp0jn+T05UpNTxbunOynb+fYHS 3pOHgEPRPuSq+G9TlA0LQSX0mKmEBwa7IIaeFArqxLcZtYTIWuNLH25t/aVdXOosDUVK DJlQYGwxDg16lZOq/vLKok6RDvSzlCo4SCMZSJUDvn/fvHwz+bQnbahCPa4VITowm5zF hSfw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679306119; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EOglr4b8wCIZjowHrmCHalgLUTFsF3VGPj317uHaVFA=; b=zt144pwAHt2dZN+IIUkDbkBC3I4ZZ0W6I9fUsfpY3CYnjDevqd4YgP5l/9LhDfxBKy Pr66sx1KocKO7tY7UD5fgZw0Kb/ugBJPPFl7bz9WyDxefz03LqrHpFsU08YHjjdaiV3/ c65Nmvkzu1riFvydIAiskpsCT34byPGvArryyVKMNyHjVSXIQg8NwpHHyOOa06ctmwBh 7+lir+4HDMJueBXWxHmdp2MWZLn1YWAt/5Rx898JOP/PYKrLRY3x4WRyz7Gda0Icxsx/ 5xML6Fy12JvQN1tXBYDUq3zs+3aMILtjdI6/lC+nY41UVAKzrmbjNhUDLoKmkW+aqi/F 1WJQ== X-Gm-Message-State: AO0yUKVBmDJxs+6bflIVXc++FGCbAeeKdPZAXrYNMzCX4DsEF/G42BB5 UeUIOwweQsCLn4BxHKEJdYsNPw== X-Google-Smtp-Source: AK7set+nN7wJ+atkoSzdFP68LNe4ASCgnZA7hoX78zbZLZDK9kBtZZM0z69izqvAxxmLwp/AJRTN/A== X-Received: by 2002:ac2:46d4:0:b0:4e9:4d61:e750 with SMTP id p20-20020ac246d4000000b004e94d61e750mr4663273lfo.32.1679306119303; Mon, 20 Mar 2023 02:55:19 -0700 (PDT) Received: from [127.0.1.1] ([85.235.12.219]) by smtp.gmail.com with ESMTPSA id c3-20020ac244a3000000b004e792045b3dsm1640104lfm.106.2023.03.20.02.55.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Mar 2023 02:55:18 -0700 (PDT) From: Linus Walleij Date: Mon, 20 Mar 2023 10:55:12 +0100 Subject: [PATCH 5/9] gpio: tqmx86: Convert to immutable irq_chip MIME-Version: 1.0 Message-Id: <20230316-immutable-chips-2-v1-5-053d6ede831b@linaro.org> References: <20230316-immutable-chips-2-v1-0-053d6ede831b@linaro.org> In-Reply-To: <20230316-immutable-chips-2-v1-0-053d6ede831b@linaro.org> To: linux-gpio@vger.kernel.org, Bartosz Golaszewski , Manivannan Sadhasivam , Thorsten Scherer , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Pengutronix Kernel Team , Maxime Coquelin , Alexandre Torgue , Robert Richter , Nobuhiro Iwamatsu , Ray Jui , Scott Branden , Broadcom internal kernel review list , Shubhrajyoti Datta , Srinivas Neeli , Michal Simek Cc: linux-arm-kernel@lists.infradead.org, linux-unisoc@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Signed-off-by: Linus Walleij --- drivers/gpio/gpio-tqmx86.c | 28 ++++++++++++++++++++-------- 1 file changed, 20 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/gpio-tqmx86.c b/drivers/gpio/gpio-tqmx86.c index e739dcea61b2..6f8bd1155db7 100644 --- a/drivers/gpio/gpio-tqmx86.c +++ b/drivers/gpio/gpio-tqmx86.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #define TQMX86_NGPIO 8 @@ -34,7 +35,6 @@ struct tqmx86_gpio_data { struct gpio_chip chip; - struct irq_chip irq_chip; void __iomem *io_base; int irq; raw_spinlock_t spinlock; @@ -122,6 +122,7 @@ static void tqmx86_gpio_irq_mask(struct irq_data *data) gpiic &= ~mask; tqmx86_gpio_write(gpio, gpiic, TQMX86_GPIIC); raw_spin_unlock_irqrestore(&gpio->spinlock, flags); + gpiochip_disable_irq(&gpio->chip, irqd_to_hwirq(data)); } static void tqmx86_gpio_irq_unmask(struct irq_data *data) @@ -134,6 +135,7 @@ static void tqmx86_gpio_irq_unmask(struct irq_data *data) mask = TQMX86_GPII_MASK << (offset * TQMX86_GPII_BITS); + gpiochip_enable_irq(&gpio->chip, irqd_to_hwirq(data)); raw_spin_lock_irqsave(&gpio->spinlock, flags); gpiic = tqmx86_gpio_read(gpio, TQMX86_GPIIC); gpiic &= ~mask; @@ -226,6 +228,22 @@ static void tqmx86_init_irq_valid_mask(struct gpio_chip *chip, clear_bit(3, valid_mask); } +static void tqmx86_gpio_irq_print_chip(struct irq_data *d, struct seq_file *p) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + + seq_printf(p, gc->label); +} + +static const struct irq_chip tqmx86_gpio_irq_chip = { + .irq_mask = tqmx86_gpio_irq_mask, + .irq_unmask = tqmx86_gpio_irq_unmask, + .irq_set_type = tqmx86_gpio_irq_set_type, + .irq_print_chip = tqmx86_gpio_irq_print_chip, + .flags = IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + static int tqmx86_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -277,14 +295,8 @@ static int tqmx86_gpio_probe(struct platform_device *pdev) pm_runtime_enable(&pdev->dev); if (irq > 0) { - struct irq_chip *irq_chip = &gpio->irq_chip; u8 irq_status; - irq_chip->name = chip->label; - irq_chip->irq_mask = tqmx86_gpio_irq_mask; - irq_chip->irq_unmask = tqmx86_gpio_irq_unmask; - irq_chip->irq_set_type = tqmx86_gpio_irq_set_type; - /* Mask all interrupts */ tqmx86_gpio_write(gpio, 0, TQMX86_GPIIC); @@ -293,7 +305,7 @@ static int tqmx86_gpio_probe(struct platform_device *pdev) tqmx86_gpio_write(gpio, irq_status, TQMX86_GPIIS); girq = &chip->irq; - girq->chip = irq_chip; + gpio_irq_chip_set_chip(girq, &tqmx86_gpio_irq_chip); girq->parent_handler = tqmx86_gpio_irq_handler; girq->num_parents = 1; girq->parents = devm_kcalloc(&pdev->dev, 1,