| Message ID | 20230201153019.269718-7-krzysztof.kozlowski@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | [1/7] dt-bindings: pinctrl: qcom,msm8226: correct GPIO name pattern | expand |
On Wed, Feb 01, 2023 at 04:30:19PM +0100, Krzysztof Kozlowski wrote: > Correct the number of GPIOs in gpio-ranges to match reality. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> AFAICT the current gpio-ranges do match the number of GPIOs (ngpios) in the pinctrl drivers for all/most of the platforms you update below. It looks like the special UFS_RESET pins are also exported as GPIOs in addition to the real GPIOs. I'm not sure if this is intended or a mistake. In any case, the gpio-ranges should match the "ngpios" in the driver, otherwise the driver exposes more GPIOs than advertised by the DT. So I think the same change should be made in the driver as well if the UFS pins are not supposed to be exposed as GPIOs. Thanks, Stephan > --- > .../devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml | 2 +- > .../devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml | 2 +- > Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml | 2 +- > .../devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml | 2 +- > Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml | 2 +- > Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml | 2 +- > Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml | 2 +- > Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml | 2 +- > .../devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml | 2 +- > Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml | 2 +- > Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml | 2 +- > 11 files changed, 11 insertions(+), 11 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml > index f33792a1af6c..77a5aaefddbe 100644 > --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml > @@ -138,7 +138,7 @@ examples: > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > - gpio-ranges = <&tlmm 0 0 120>; > + gpio-ranges = <&tlmm 0 0 119>; > wakeup-parent = <&pdc>; > > dp_hot_plug_det: dp-hot-plug-det-state { > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml > index 97b27d6835e9..854bbb5b6f5d 100644 > --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml > @@ -128,7 +128,7 @@ examples: > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > - gpio-ranges = <&tlmm 0 0 230>; > + gpio-ranges = <&tlmm 0 0 228>; > > gpio-wo-subnode-state { > pins = "gpio1"; > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml > index f586b3aa138e..03c7b5c97599 100644 > --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml > @@ -119,7 +119,7 @@ examples: > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > - gpio-ranges = <&tlmm 0 0 151>; > + gpio-ranges = <&tlmm 0 0 150>; > > qup-i2c9-state { > pins = "gpio6", "gpio7"; > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml > index 23d7c030fec0..a08e4557d8b7 100644 > --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml > @@ -134,7 +134,7 @@ examples: > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > - gpio-ranges = <&tlmm 0 0 151>; > + gpio-ranges = <&tlmm 0 0 150>; > wakeup-parent = <&pdc_intc>; > > ap-suspend-l-hog { > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml > index 89c5562583d1..96375f58fa22 100644 > --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml > @@ -140,7 +140,7 @@ examples: > reg = <0x03000000 0xdc2000>; > gpio-controller; > #gpio-cells = <2>; > - gpio-ranges = <&tlmm 0 0 109>; > + gpio-ranges = <&tlmm 0 0 108>; > interrupt-controller; > #interrupt-cells = <2>; > interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>; > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml > index 29325483cd2b..d35db4f4581b 100644 > --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml > @@ -121,7 +121,7 @@ examples: > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > - gpio-ranges = <&tlmm 0 0 114>; > + gpio-ranges = <&tlmm 0 0 113>; > > sdc2_on_state: sdc2-on-state { > clk-pins { > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml > index c9bc4893e8e8..83848950cc3b 100644 > --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml > @@ -125,7 +125,7 @@ examples: > reg-names = "west", "south", "east"; > interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; > gpio-controller; > - gpio-ranges = <&tlmm 0 0 134>; > + gpio-ranges = <&tlmm 0 0 133>; > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml > index d95935fcc8b5..3fe1f1668fbc 100644 > --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml > @@ -142,7 +142,7 @@ examples: > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > - gpio-ranges = <&tlmm 0 0 157>; > + gpio-ranges = <&tlmm 0 0 156>; > > gpio-wo-subnode-state { > pins = "gpio1"; > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml > index 4376a9bd4d70..4c9ad9079e69 100644 > --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml > @@ -136,7 +136,7 @@ examples: > <0x03d00000 0x300000>; > reg-names = "west", "east", "north", "south"; > interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; > - gpio-ranges = <&tlmm 0 0 176>; > + gpio-ranges = <&tlmm 0 0 175>; > gpio-controller; > #gpio-cells = <2>; > interrupt-controller; > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml > index 56c8046f1be0..c4cec40cbb92 100644 > --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml > @@ -124,7 +124,7 @@ examples: > reg = <0x0f100000 0x300000>; > gpio-controller; > #gpio-cells = <2>; > - gpio-ranges = <&tlmm 0 0 211>; > + gpio-ranges = <&tlmm 0 0 210>; > interrupt-controller; > #interrupt-cells = <2>; > interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml > index a457425ba112..6ecc1ad6ccd4 100644 > --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml > @@ -136,7 +136,7 @@ examples: > reg = <0x0f100000 0x300000>; > gpio-controller; > #gpio-cells = <2>; > - gpio-ranges = <&tlmm 0 0 211>; > + gpio-ranges = <&tlmm 0 0 210>; > interrupt-controller; > #interrupt-cells = <2>; > interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; > -- > 2.34.1 >
On Wed, Feb 01, 2023 at 05:07:40PM +0100, Stephan Gerhold wrote: > On Wed, Feb 01, 2023 at 04:30:19PM +0100, Krzysztof Kozlowski wrote: > > Correct the number of GPIOs in gpio-ranges to match reality. > > > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > AFAICT the current gpio-ranges do match the number of GPIOs (ngpios) in > the pinctrl drivers for all/most of the platforms you update below. It > looks like the special UFS_RESET pins are also exported as GPIOs in > addition to the real GPIOs. I'm not sure if this is intended or a > mistake. > It looks like this is on purpose: --- From 53a5372ce326116f3e3d3f1d701113b2542509f4 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson <bjorn.andersson@linaro.org> Date: Tue, 4 Jun 2019 00:19:59 -0700 Subject: [PATCH] pinctrl: qcom: sdm845: Expose ufs_reset as gpio The ufs_reset pin is expected to be wired to the reset pin of the primary UFS memory but is pretty much just a general purpose output pinr Reorder the pins and expose it as gpio 150, so that the UFS driver can toggle it. --- And it's used in sdm845-mtp.dts: &ufs_mem_hc { reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; }; So I think this patch (together with the DT ones you sent) should be dropped because it would prevent using the UFS_RESET as GPIO since it's no longer included in gpio-ranges. Thanks, Stephan
On 01/02/2023 17:31, Stephan Gerhold wrote: > On Wed, Feb 01, 2023 at 05:07:40PM +0100, Stephan Gerhold wrote: >> On Wed, Feb 01, 2023 at 04:30:19PM +0100, Krzysztof Kozlowski wrote: >>> Correct the number of GPIOs in gpio-ranges to match reality. >>> >>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >> >> AFAICT the current gpio-ranges do match the number of GPIOs (ngpios) in >> the pinctrl drivers for all/most of the platforms you update below. It >> looks like the special UFS_RESET pins are also exported as GPIOs in >> addition to the real GPIOs. I'm not sure if this is intended or a >> mistake. >> > > It looks like this is on purpose: > > --- > From 53a5372ce326116f3e3d3f1d701113b2542509f4 Mon Sep 17 00:00:00 2001 > From: Bjorn Andersson <bjorn.andersson@linaro.org> > Date: Tue, 4 Jun 2019 00:19:59 -0700 > Subject: [PATCH] pinctrl: qcom: sdm845: Expose ufs_reset as gpio > > The ufs_reset pin is expected to be wired to the reset pin of the > primary UFS memory but is pretty much just a general purpose output pinr > > Reorder the pins and expose it as gpio 150, so that the UFS driver can > toggle it. > --- > > And it's used in sdm845-mtp.dts: > > &ufs_mem_hc { > reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; > }; > > So I think this patch (together with the DT ones you sent) should be > dropped because it would prevent using the UFS_RESET as GPIO since it's > no longer included in gpio-ranges. Thanks, but then we need to fix few others which miss the UFS reset pin. Best regards, Krzysztof
On 01/02/2023 16:30, Krzysztof Kozlowski wrote: > Correct the number of GPIOs in gpio-ranges to match reality. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml | 2 +- > .../devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml | 2 +- > Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml | 2 +- > .../devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml | 2 +- > Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml | 2 +- > Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml | 2 +- > Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml | 2 +- > Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml | 2 +- > .../devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml | 2 +- > Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml | 2 +- > Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml | 2 +- As pointed out by Stephan, this is mostly incorrect and needs fixes. There will be a v2. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml index f33792a1af6c..77a5aaefddbe 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml @@ -138,7 +138,7 @@ examples: #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 120>; + gpio-ranges = <&tlmm 0 0 119>; wakeup-parent = <&pdc>; dp_hot_plug_det: dp-hot-plug-det-state { diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml index 97b27d6835e9..854bbb5b6f5d 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml @@ -128,7 +128,7 @@ examples: #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 230>; + gpio-ranges = <&tlmm 0 0 228>; gpio-wo-subnode-state { pins = "gpio1"; diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml index f586b3aa138e..03c7b5c97599 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml @@ -119,7 +119,7 @@ examples: #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 151>; + gpio-ranges = <&tlmm 0 0 150>; qup-i2c9-state { pins = "gpio6", "gpio7"; diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml index 23d7c030fec0..a08e4557d8b7 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml @@ -134,7 +134,7 @@ examples: #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 151>; + gpio-ranges = <&tlmm 0 0 150>; wakeup-parent = <&pdc_intc>; ap-suspend-l-hog { diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml index 89c5562583d1..96375f58fa22 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml @@ -140,7 +140,7 @@ examples: reg = <0x03000000 0xdc2000>; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&tlmm 0 0 109>; + gpio-ranges = <&tlmm 0 0 108>; interrupt-controller; #interrupt-cells = <2>; interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>; diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml index 29325483cd2b..d35db4f4581b 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml @@ -121,7 +121,7 @@ examples: #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 114>; + gpio-ranges = <&tlmm 0 0 113>; sdc2_on_state: sdc2-on-state { clk-pins { diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml index c9bc4893e8e8..83848950cc3b 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml @@ -125,7 +125,7 @@ examples: reg-names = "west", "south", "east"; interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; - gpio-ranges = <&tlmm 0 0 134>; + gpio-ranges = <&tlmm 0 0 133>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml index d95935fcc8b5..3fe1f1668fbc 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml @@ -142,7 +142,7 @@ examples: #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 157>; + gpio-ranges = <&tlmm 0 0 156>; gpio-wo-subnode-state { pins = "gpio1"; diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml index 4376a9bd4d70..4c9ad9079e69 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml @@ -136,7 +136,7 @@ examples: <0x03d00000 0x300000>; reg-names = "west", "east", "north", "south"; interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; - gpio-ranges = <&tlmm 0 0 176>; + gpio-ranges = <&tlmm 0 0 175>; gpio-controller; #gpio-cells = <2>; interrupt-controller; diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml index 56c8046f1be0..c4cec40cbb92 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml @@ -124,7 +124,7 @@ examples: reg = <0x0f100000 0x300000>; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&tlmm 0 0 211>; + gpio-ranges = <&tlmm 0 0 210>; interrupt-controller; #interrupt-cells = <2>; interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml index a457425ba112..6ecc1ad6ccd4 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml @@ -136,7 +136,7 @@ examples: reg = <0x0f100000 0x300000>; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&tlmm 0 0 211>; + gpio-ranges = <&tlmm 0 0 210>; interrupt-controller; #interrupt-cells = <2>; interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
Correct the number of GPIOs in gpio-ranges to match reality. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- .../devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml | 2 +- .../devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml | 2 +- Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml | 2 +- .../devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml | 2 +- Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml | 2 +- Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml | 2 +- Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml | 2 +- Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml | 2 +- .../devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml | 2 +- Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml | 2 +- Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml | 2 +- 11 files changed, 11 insertions(+), 11 deletions(-)