| Message ID | 20220926074415.53100-2-krzysztof.kozlowski@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | pinctrl/arm64: qcom: continued - fix Qualcomm TLMM pinctrl schema warnings | expand |
On 26.09.2022 09:43, Krzysztof Kozlowski wrote: > When BLSPI1 (originally SPI0, later renamed in commit f82c48d46852 > ("arm64: dts: qcom: ipq6018: correct QUP peripheral labels")) was added, > the device node lacked respective pin configuration assignment. It > used also blsp0_spi function but that was probably the same mistake as > naming it SPI0. > > Fixes: 5bf635621245 ("arm64: dts: ipq6018: Add a few device nodes") > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Konrad > arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts > index 1ba2eca33c7b..afc2dc79767d 100644 > --- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts > +++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts > @@ -37,6 +37,8 @@ &blsp1_i2c3 { > > &blsp1_spi1 { > cs-select = <0>; > + pinctrl-0 = <&spi_0_pins>; > + pinctrl-names = "default"; > status = "okay"; > > flash@0 { > @@ -57,7 +59,7 @@ i2c_1_pins: i2c-1-pins { > > spi_0_pins: spi-0-pins { > pins = "gpio38", "gpio39", "gpio40", "gpio41"; > - function = "blsp0_spi"; > + function = "blsp1_spi"; > drive-strength = <8>; > bias-pull-down; > };
On 26. 09. 2022. 09:43, Krzysztof Kozlowski wrote: > When BLSPI1 (originally SPI0, later renamed in commit f82c48d46852 > ("arm64: dts: qcom: ipq6018: correct QUP peripheral labels")) was added, > the device node lacked respective pin configuration assignment. It > used also blsp0_spi function but that was probably the same mistake as > naming it SPI0. Hi, Sorry for making it confusing, but "blsp0_spi" is the correct function. Pinctrl driver and datasheets call functions blsp0-blps5, but usually in DT we call the nodes blsp1-blsp6. It would probably be better for me to rename the nodes to blsp0-5 instead. Regards, Robert > > Fixes: 5bf635621245 ("arm64: dts: ipq6018: Add a few device nodes") > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts > index 1ba2eca33c7b..afc2dc79767d 100644 > --- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts > +++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts > @@ -37,6 +37,8 @@ &blsp1_i2c3 { > > &blsp1_spi1 { > cs-select = <0>; > + pinctrl-0 = <&spi_0_pins>; > + pinctrl-names = "default"; > status = "okay"; > > flash@0 { > @@ -57,7 +59,7 @@ i2c_1_pins: i2c-1-pins { > > spi_0_pins: spi-0-pins { > pins = "gpio38", "gpio39", "gpio40", "gpio41"; > - function = "blsp0_spi"; > + function = "blsp1_spi"; > drive-strength = <8>; > bias-pull-down; > };
On 27/09/2022 16:01, Robert Marko wrote: > > On 26. 09. 2022. 09:43, Krzysztof Kozlowski wrote: >> When BLSPI1 (originally SPI0, later renamed in commit f82c48d46852 >> ("arm64: dts: qcom: ipq6018: correct QUP peripheral labels")) was added, >> the device node lacked respective pin configuration assignment. It >> used also blsp0_spi function but that was probably the same mistake as >> naming it SPI0. > > Hi, > > Sorry for making it confusing, but "blsp0_spi" is the correct function. > Pinctrl driver and datasheets call functions blsp0-blps5, but usually in DT > we call the nodes blsp1-blsp6. > > It would probably be better for me to rename the nodes to blsp0-5 instead. OK, so instead I will add blsp0_spi to the bindings. Best regards, Krzysztof
On 27. 09. 2022. 16:33, Krzysztof Kozlowski wrote: > On 27/09/2022 16:01, Robert Marko wrote: >> On 26. 09. 2022. 09:43, Krzysztof Kozlowski wrote: >>> When BLSPI1 (originally SPI0, later renamed in commit f82c48d46852 >>> ("arm64: dts: qcom: ipq6018: correct QUP peripheral labels")) was added, >>> the device node lacked respective pin configuration assignment. It >>> used also blsp0_spi function but that was probably the same mistake as >>> naming it SPI0. >> Hi, >> >> Sorry for making it confusing, but "blsp0_spi" is the correct function. >> Pinctrl driver and datasheets call functions blsp0-blps5, but usually in DT >> we call the nodes blsp1-blsp6. >> >> It would probably be better for me to rename the nodes to blsp0-5 instead. > OK, so instead I will add blsp0_spi to the bindings. Can you add blsp0_uart and blsp0_i2c as well? All 6 of the QUP-s have same features. I am adding MDIO to CP01, so I can add mdc and mdio to bindings as they are lacking there as well. Regards, Robert > > Best regards, > Krzysztof >
On 27/09/2022 17:20, Robert Marko wrote: > > On 27. 09. 2022. 16:33, Krzysztof Kozlowski wrote: >> On 27/09/2022 16:01, Robert Marko wrote: >>> On 26. 09. 2022. 09:43, Krzysztof Kozlowski wrote: >>>> When BLSPI1 (originally SPI0, later renamed in commit f82c48d46852 >>>> ("arm64: dts: qcom: ipq6018: correct QUP peripheral labels")) was added, >>>> the device node lacked respective pin configuration assignment. It >>>> used also blsp0_spi function but that was probably the same mistake as >>>> naming it SPI0. >>> Hi, >>> >>> Sorry for making it confusing, but "blsp0_spi" is the correct function. >>> Pinctrl driver and datasheets call functions blsp0-blps5, but usually in DT >>> we call the nodes blsp1-blsp6. >>> >>> It would probably be better for me to rename the nodes to blsp0-5 instead. >> OK, so instead I will add blsp0_spi to the bindings. > > Can you add blsp0_uart and blsp0_i2c as well? > All 6 of the QUP-s have same features. Sure Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts index 1ba2eca33c7b..afc2dc79767d 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts +++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts @@ -37,6 +37,8 @@ &blsp1_i2c3 { &blsp1_spi1 { cs-select = <0>; + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; status = "okay"; flash@0 { @@ -57,7 +59,7 @@ i2c_1_pins: i2c-1-pins { spi_0_pins: spi-0-pins { pins = "gpio38", "gpio39", "gpio40", "gpio41"; - function = "blsp0_spi"; + function = "blsp1_spi"; drive-strength = <8>; bias-pull-down; };
When BLSPI1 (originally SPI0, later renamed in commit f82c48d46852 ("arm64: dts: qcom: ipq6018: correct QUP peripheral labels")) was added, the device node lacked respective pin configuration assignment. It used also blsp0_spi function but that was probably the same mistake as naming it SPI0. Fixes: 5bf635621245 ("arm64: dts: ipq6018: Add a few device nodes") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)