diff mbox series

[3/5] gpio: thunderx: Configure GPIO pins at probe

Message ID 20220427144620.9105-4-pmalgujar@marvell.com
State New
Headers show
Series gpio: thunderx: Marvell GPIO changes. | expand

Commit Message

Piyush Malgujar April 27, 2022, 2:46 p.m. UTC
Add support to configure GPIO pins using DTS 'pin-cfg'

Signed-off-by: Piyush Malgujar <pmalgujar@marvell.com>
---
 drivers/gpio/gpio-thunderx.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

Comments

kernel test robot April 28, 2022, 1:59 a.m. UTC | #1
Hi Piyush,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on linusw-gpio/for-next linux/master v5.18-rc4 next-20220427]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/intel-lab-lkp/linux/commits/Piyush-Malgujar/gpio-thunderx-Marvell-GPIO-changes/20220427-225001
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 46cf2c613f4b10eb12f749207b0fd2c1bfae3088
config: alpha-randconfig-r005-20220427 (https://download.01.org/0day-ci/archive/20220428/202204280405.DMzMLx60-lkp@intel.com/config)
compiler: alpha-linux-gcc (GCC) 11.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/31a85ad65112e3ed61aa418772670eb96a881a4f
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Piyush-Malgujar/gpio-thunderx-Marvell-GPIO-changes/20220427-225001
        git checkout 31a85ad65112e3ed61aa418772670eb96a881a4f
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.3.0 make.cross W=1 O=build_dir ARCH=alpha SHELL=/bin/bash drivers/gpio/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   drivers/gpio/gpio-thunderx.c: In function 'thunderx_gpio_pinsel':
>> drivers/gpio/gpio-thunderx.c:448:23: error: implicit declaration of function 'of_read_number' [-Werror=implicit-function-declaration]
     448 |                 pin = of_read_number(pinsel++, 1);
         |                       ^~~~~~~~~~~~~~
   cc1: some warnings being treated as errors


vim +/of_read_number +448 drivers/gpio/gpio-thunderx.c

   428	
   429	static void thunderx_gpio_pinsel(struct device *dev,
   430					 struct thunderx_gpio *txgpio)
   431	{
   432		struct device_node *node;
   433		const __be32 *pinsel;
   434		int npins, rlen, i;
   435		u32 pin, sel;
   436	
   437		node = dev_of_node(dev);
   438		if (!node)
   439			return;
   440	
   441		pinsel = of_get_property(node, "pin-cfg", &rlen);
   442		if (!pinsel || rlen % 2)
   443			return;
   444	
   445		npins = rlen / sizeof(__be32) / 2;
   446	
   447		for (i = 0; i < npins; i++) {
 > 448			pin = of_read_number(pinsel++, 1);
   449			sel = of_read_number(pinsel++, 1);
   450			dev_dbg(dev, "Set GPIO pin %d CFG register to %x\n", pin, sel);
   451			writeq(sel, txgpio->register_base + bit_cfg_reg(pin));
   452		}
   453	}
   454
diff mbox series

Patch

diff --git a/drivers/gpio/gpio-thunderx.c b/drivers/gpio/gpio-thunderx.c
index bb2b40e4033b00134af35592b6b7c7f83cf6c737..451c412512450fea717937376002d2ba35d1c508 100644
--- a/drivers/gpio/gpio-thunderx.c
+++ b/drivers/gpio/gpio-thunderx.c
@@ -426,6 +426,32 @@  static void *thunderx_gpio_populate_parent_alloc_info(struct gpio_chip *chip,
 	return info;
 }
 
+static void thunderx_gpio_pinsel(struct device *dev,
+				 struct thunderx_gpio *txgpio)
+{
+	struct device_node *node;
+	const __be32 *pinsel;
+	int npins, rlen, i;
+	u32 pin, sel;
+
+	node = dev_of_node(dev);
+	if (!node)
+		return;
+
+	pinsel = of_get_property(node, "pin-cfg", &rlen);
+	if (!pinsel || rlen % 2)
+		return;
+
+	npins = rlen / sizeof(__be32) / 2;
+
+	for (i = 0; i < npins; i++) {
+		pin = of_read_number(pinsel++, 1);
+		sel = of_read_number(pinsel++, 1);
+		dev_dbg(dev, "Set GPIO pin %d CFG register to %x\n", pin, sel);
+		writeq(sel, txgpio->register_base + bit_cfg_reg(pin));
+	}
+}
+
 static int thunderx_gpio_probe(struct pci_dev *pdev,
 			       const struct pci_device_id *id)
 {
@@ -548,6 +574,9 @@  static int thunderx_gpio_probe(struct pci_dev *pdev,
 	if (err)
 		goto out;
 
+	/* Configure default functions of GPIO pins */
+	thunderx_gpio_pinsel(dev, txgpio);
+
 	/* Push on irq_data and the domain for each line. */
 	for (i = 0; i < ngpio; i++) {
 		struct irq_fwspec fwspec;