diff mbox series

pinctrl: stm32: consider the GPIO offset to expose all the GPIO lines

Message ID 20211215095808.621716-1-fabien.dessenne@foss.st.com
State New
Headers show
Series pinctrl: stm32: consider the GPIO offset to expose all the GPIO lines | expand

Commit Message

Fabien Dessenne Dec. 15, 2021, 9:58 a.m. UTC
Consider the GPIO controller offset (from "gpio-ranges") to compute the
maximum GPIO line number.
This fixes an issue where gpio-ranges uses a non-null offset.
  e.g.: gpio-ranges = <&pinctrl 6 86 10>
        In that case the last valid GPIO line is not 9 but 15 (6 + 10 - 1)

Fixes: 67e2996f72c7 ("pinctrl: stm32: fix the reported number of GPIO lines per bank")
Reported-by: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
---
 drivers/pinctrl/stm32/pinctrl-stm32.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Linus Walleij Dec. 16, 2021, 3:15 a.m. UTC | #1
On Wed, Dec 15, 2021 at 10:58 AM Fabien Dessenne
<fabien.dessenne@foss.st.com> wrote:

> Consider the GPIO controller offset (from "gpio-ranges") to compute the
> maximum GPIO line number.
> This fixes an issue where gpio-ranges uses a non-null offset.
>   e.g.: gpio-ranges = <&pinctrl 6 86 10>
>         In that case the last valid GPIO line is not 9 but 15 (6 + 10 - 1)
>
> Fixes: 67e2996f72c7 ("pinctrl: stm32: fix the reported number of GPIO lines per bank")
> Reported-by: Christoph Fritz <chf.fritz@googlemail.com>
> Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>

Patch applied for fixes and tagged for stable.

Yours,
Linus Walleij
diff mbox series

Patch

diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c
index 24764ebcc936..9ed764731570 100644
--- a/drivers/pinctrl/stm32/pinctrl-stm32.c
+++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
@@ -1251,10 +1251,10 @@  static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
 		bank_nr = args.args[1] / STM32_GPIO_PINS_PER_BANK;
 		bank->gpio_chip.base = args.args[1];
 
-		npins = args.args[2];
-		while (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3,
-							 ++i, &args))
-			npins += args.args[2];
+		/* get the last defined gpio line (offset + nb of pins) */
+		npins = args.args[0] + args.args[2];
+		while (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, ++i, &args))
+			npins = max(npins, (int)(args.args[0] + args.args[2]));
 	} else {
 		bank_nr = pctl->nbanks;
 		bank->gpio_chip.base = bank_nr * STM32_GPIO_PINS_PER_BANK;