From patchwork Thu Dec 10 14:03:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 1414224 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=wdc.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=wdc.com header.i=@wdc.com header.a=rsa-sha256 header.s=dkim.wdc.com header.b=Y0nqAGFB; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4CsG3328CBz9sWr for ; Fri, 11 Dec 2020 01:07:59 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390006AbgLJOHb (ORCPT ); Thu, 10 Dec 2020 09:07:31 -0500 Received: from esa3.hgst.iphmx.com ([216.71.153.141]:5144 "EHLO esa3.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389833AbgLJOHW (ORCPT ); Thu, 10 Dec 2020 09:07:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1607609241; x=1639145241; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wpPA/e1d64q46vhHTV7xhymQZVduytCa1A5+ds1puSU=; b=Y0nqAGFBB2jqF0iw97UNRjtg2RlUFGK8O1CDMux0pcA55RrLNPyXii7k NIt4Wj0/psfd8eP5AXZciydHd3I/+kki2ZAJ7a6ot44eAOq2J9lInc092 DGmIBJ2B0lAmGi7VcvVqrdn1Ktumsuv3/HBKjUNG6SZUBX1Uc5jnfMNTg nqk6JJ5rh1nsQxk0h7458MEC4b8Zl+M9I5/XT7V8GWCN6Xz4vyOAFPfyt wgtWIdgNfq/+q26j2lXA2KHmFgu7EuX6k9rQWeYTbHWZ1KdVYBfLPWSj7 B20N86o3fDDPUE3h6WxmtCWBGGEyUM7IsI4RlRjpjJBv6bMTX93baJQSm A==; IronPort-SDR: jHhijMtqZ+GXyO1pCc7DMr0YCmdNzFLIhvMNnpey5B2lSfDfps/bApKArhU15M5xRYUu0emy4k W6rj0Grn1x+zEqNM3TdO5wddvAhGTgjJ60LysguIPD5OmJ9G0htebQS/6WGacmrVp1yV0V3bu8 i5Rz/IT4otg5vVH2oC9T3b0K4frce/RtE2B3XxC4GsLI1NqYObCFuG43LZDehhIZtWdgS2j4EO +xdNA/tOp74G2Mqr/kNCqo6mwDPK/gZRV/j2U2aclWPWi7V9F3rRcWYVs3YLPYNMd27/tooE4d eD4= X-IronPort-AV: E=Sophos;i="5.78,408,1599494400"; d="scan'208";a="159316775" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 10 Dec 2020 22:03:54 +0800 IronPort-SDR: 9QL1pYTgRTk7JMVj/hAY7LS8DQ/m/dgUnhFmAfU8uBoua4mHK+8wNF1MDpuz+noOX4+oUZbkVy DlP7uvtKupyCHVyePGIAQRTkIcMRtEPbM= Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Dec 2020 05:47:46 -0800 IronPort-SDR: z/4P/6xnOmhkxrtwPpTKZbqrJI33nAeM3jHxm2TNNPnH00k7LusLUGoBhej2l756wZkX72ZgFp NupxhpwDxAOw== WDCIronportException: Internal Received: from wdapacbjl0003.my.asia.wdc.com (HELO twashi.fujisawa.hgst.com) ([10.84.71.173]) by uls-op-cesaip02.wdc.com with ESMTP; 10 Dec 2020 06:03:54 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org, Rob Herring , devicetree@vger.kernel.org, Stephen Boyd , linux-clk@vger.kernel.org, Linus Walleij , linux-gpio@vger.kernel.org, Philipp Zabel Cc: Sean Anderson Subject: [PATCH v8 18/22] riscv: Add SiPeed MAIX GO board device tree Date: Thu, 10 Dec 2020 23:03:09 +0900 Message-Id: <20201210140313.258739-19-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201210140313.258739-1-damien.lemoal@wdc.com> References: <20201210140313.258739-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add a device tree for the SiPeed MAIX GO board. This device tree enables buttons, LEDs, gpio, i2c and spi/mmc SD card devices. Signed-off-by: Damien Le Moal --- arch/riscv/boot/dts/canaan/k210_maix_go.dts | 237 ++++++++++++++++++++ 1 file changed, 237 insertions(+) create mode 100644 arch/riscv/boot/dts/canaan/k210_maix_go.dts diff --git a/arch/riscv/boot/dts/canaan/k210_maix_go.dts b/arch/riscv/boot/dts/canaan/k210_maix_go.dts new file mode 100644 index 000000000000..c3294dfaa3c6 --- /dev/null +++ b/arch/riscv/boot/dts/canaan/k210_maix_go.dts @@ -0,0 +1,237 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-20 Sean Anderson + * Copyright (C) 2020 Western Digital Corporation or its affiliates. + */ + +/dts-v1/; + +#include "k210.dtsi" + +#include +#include + +/ { + model = "SiPeed MAIX GO"; + compatible = "sipeed,maix-go", "canaan,kendryte-k210"; + + chosen { + bootargs = "earlycon console=ttySIF0"; + stdout-path = "serial0:115200n8"; + }; + + gpio-leds { + compatible = "gpio-leds"; + + green { + gpios = <&gpio1_0 4 GPIO_ACTIVE_LOW>; + }; + + red { + gpios = <&gpio1_0 5 GPIO_ACTIVE_LOW>; + }; + + blue { + gpios = <&gpio1_0 6 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + up { + label = "UP"; + linux,code = ; + gpios = <&gpio1_0 7 GPIO_ACTIVE_LOW>; + }; + + press { + label = "PRESS"; + linux,code = ; + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; + }; + + down { + label = "DOWN"; + linux,code = ; + gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + status = "disabled"; + + simple-audio-card,cpu { + sound-dai = <&i2s0 0>; + }; + + simple-audio-card,codec { + sound-dai = <&mic>; + }; + }; + + mic: mic { + #sound-dai-cells = <0>; + compatible = "memsensing,msm261s4030h0"; + status = "disabled"; + }; +}; + +&fpioa { + pinctrl-0 = <&jtag_pinctrl>; + pinctrl-names = "default"; + status = "okay"; + + jtag_pinctrl: jtag-pinmux { + pinmux = , + , + , + ; + }; + + uarths_pinctrl: uarths-pinmux { + pinmux = , + ; + }; + + gpio_pinctrl: gpio-pinmux { + pinmux = , + , + , + , + , + , + , + ; + }; + + gpiohs_pinctrl: gpiohs-pinmux { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + }; + + i2s0_pinctrl: i2s0-pinmux { + pinmux = , + , + ; + }; + + dvp_pinctrl: dvp-pinmux { + pinmux = , + , + , + , + , + , + , + ; + }; + + spi0_pinctrl: spi0-pinmux { + pinmux = , /* cs */ + , /* rst */ + , /* dc */ + ; /* wr */ + }; + + spi1_pinctrl: spi1-pinmux { + pinmux = , + , + , + ; /* cs */ + }; + + i2c1_pinctrl: i2c1-pinmux { + pinmux = , + ; + }; +}; + +&uarths0 { + pinctrl-0 = <&uarths_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio0 { + pinctrl-0 = <&gpiohs_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio1 { + pinctrl-0 = <&gpio_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0 { + #sound-dai-cells = <1>; + pinctrl-0 = <&i2s0_pinctrl>; + pinctrl-names = "default"; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_pinctrl>; + pinctrl-names = "default"; + clock-frequency = <400000>; + status = "okay"; +}; + +&dvp0 { + pinctrl-0 = <&dvp_pinctrl>; + pinctrl-names = "default"; +}; + +&spi0 { + pinctrl-0 = <&spi0_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; + + panel@0 { + compatible = "sitronix,st7789v"; + reg = <0>; + reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>; + spi-max-frequency = <15000000>; + status = "disabled"; + }; +}; + +&spi1 { + pinctrl-0 = <&spi1_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; + status = "okay"; + + slot@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + voltage-ranges = <3300 3300>; + spi-max-frequency = <25000000>; + broken-cd; + }; +}; + +&spi3 { + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + broken-flash-reset; + }; +};