| Message ID | 20200721054033.18520-3-hanks.chen@mediatek.com |
|---|---|
| State | New |
| Headers | show |
| Series | Remove MT6779 UART3 clock support | expand |
diff --git a/drivers/clk/mediatek/clk-mt6779.c b/drivers/clk/mediatek/clk-mt6779.c index 9766cccf5844..75f2235486be 100644 --- a/drivers/clk/mediatek/clk-mt6779.c +++ b/drivers/clk/mediatek/clk-mt6779.c @@ -923,8 +923,6 @@ static const struct mtk_gate infra_clks[] = { "uart_sel", 23), GATE_INFRA0(CLK_INFRA_UART2, "infra_uart2", "uart_sel", 24), - GATE_INFRA0(CLK_INFRA_UART3, "infra_uart3", - "uart_sel", 25), GATE_INFRA0(CLK_INFRA_GCE_26M, "infra_gce_26m", "axi_sel", 27), GATE_INFRA0(CLK_INFRA_CQ_DMA_FPC, "infra_cqdma_fpc",
CLK_INFRA_UART3 is a dummy clk interface, it has no effect on the operation of the read/write instruction. Fixes: 710774e04861 ("clk: mediatek: Add MT6779 clock support") Signed-off-by: Hanks Chen <hanks.chen@mediatek.com> --- drivers/clk/mediatek/clk-mt6779.c | 2 -- 1 file changed, 2 deletions(-)