From patchwork Fri Nov 29 18:58:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 1202564 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=redhat.com header.i=@redhat.com header.b="ba1VxS3x"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47PkLj2F8bz9sP6 for ; Sat, 30 Nov 2019 05:58:53 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727043AbfK2S6w (ORCPT ); Fri, 29 Nov 2019 13:58:52 -0500 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:49769 "EHLO us-smtp-1.mimecast.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727040AbfK2S6w (ORCPT ); Fri, 29 Nov 2019 13:58:52 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1575053929; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=iHdIf5DEwqZ4oiu8pXmkbl8bWQDgyW+26r2hQisPZ+8=; b=ba1VxS3x6f9vI0s1afNBbTEaJd2axCWTsEM5E1xrKlomlVDgP1TaEah39X39hAcJ42pFcO WcZ22Zj/+6SapgrCkFLA9JOY4v99HUJJ5wnVk9WBw0G7BCojjdQLubyU3yWaFJuwhbscJ3 qbkQIx5oagdk9P2RRx1VHlVucYkrXj0= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-56-Y4E04LTsPaS5tNrYWn6P7w-1; Fri, 29 Nov 2019 13:58:48 -0500 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 0519F107ACC5; Fri, 29 Nov 2019 18:58:46 +0000 (UTC) Received: from shalem.localdomain.com (ovpn-116-133.ams2.redhat.com [10.36.116.133]) by smtp.corp.redhat.com (Postfix) with ESMTP id B17CC10013D9; Fri, 29 Nov 2019 18:58:43 +0000 (UTC) From: Hans de Goede To: Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= , Mika Westerberg , Andy Shevchenko , Bartosz Golaszewski , Linus Walleij Cc: Hans de Goede , intel-gfx , dri-devel@lists.freedesktop.org, linux-gpio@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH 2/2] drm/i915/vlv_dsi: Control panel and backlight enable GPIOs on BYT Date: Fri, 29 Nov 2019 19:58:36 +0100 Message-Id: <20191129185836.2789-3-hdegoede@redhat.com> In-Reply-To: <20191129185836.2789-1-hdegoede@redhat.com> References: <20191129185836.2789-1-hdegoede@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-MC-Unique: Y4E04LTsPaS5tNrYWn6P7w-1 X-Mimecast-Spam-Score: 0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Bay Trail devices the MIPI power on/off sequences for DSI LCD panels do not control the LCD panel- and backlight-enable GPIOs. So far, when the VBT indicates we should use the SoC for backlight control, we have been relying on these GPIOs being configured as output and driven high by the Video BIOS (GOP) when it initializes the panel. This does not work when the device is booted with a HDMI monitor connected as then the GOP will initialize the HDMI instead of the panel, leaving the panel black, even though the i915 driver tries to output an image to it. Likewise on some device-models when the GOP does not initialize the DSI panel it also leaves the mux of the PWM0 pin in generic GPIO mode instead of muxing it to the PWM controller. This commit makes the DSI code control the SoC GPIOs for panel- and backlight-enable on BYT, when the VBT indicates the SoC should be used for backlight control. It also ensures that the PWM0 pin is muxed to the PWM controller in this case. This fixes the LCD panel not lighting up on various devices when booted with a HDMI monitor connected. This has been tested to fix this on the following devices: Peaq C1010 Point of View MOBII TAB-P800W Point of View MOBII TAB-P1005W Terra Pad 1061 Yours Y8W81 Signed-off-by: Hans de Goede --- drivers/gpu/drm/i915/display/intel_dsi.h | 3 +- drivers/gpu/drm/i915/display/vlv_dsi.c | 44 ++++++++++++++++++++++-- 2 files changed, 43 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dsi.h b/drivers/gpu/drm/i915/display/intel_dsi.h index b15be5814599..6ff1b59b0f6f 100644 --- a/drivers/gpu/drm/i915/display/intel_dsi.h +++ b/drivers/gpu/drm/i915/display/intel_dsi.h @@ -45,8 +45,9 @@ struct intel_dsi { struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS]; intel_wakeref_t io_wakeref[I915_MAX_PORTS]; - /* GPIO Desc for CRC based Panel control */ + /* GPIO Desc for panel and backlight control */ struct gpio_desc *gpio_panel; + struct gpio_desc *gpio_backlight; struct intel_connector *attached_connector; diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c index fc63e2f6a511..bd081a3bb54b 100644 --- a/drivers/gpu/drm/i915/display/vlv_dsi.c +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c @@ -24,6 +24,7 @@ */ #include +#include #include #include @@ -797,7 +798,7 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder, if (!IS_GEMINILAKE(dev_priv)) intel_dsi_prepare(encoder, pipe_config); - /* Power on, try both CRC pmic gpio and VBT */ + /* Power on, try both the panel-enable GPIO and the MIPI seq. */ if (intel_dsi->gpio_panel) gpiod_set_value_cansleep(intel_dsi->gpio_panel, 1); intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_POWER_ON); @@ -843,6 +844,9 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder, } intel_panel_enable_backlight(pipe_config, conn_state); + /* Backlight on, try both the backlight-enable GPIO and the MIPI seq. */ + if (intel_dsi->gpio_backlight) + gpiod_set_value_cansleep(intel_dsi->gpio_backlight, 1); intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_ON); } @@ -859,7 +863,10 @@ static void intel_dsi_disable(struct intel_encoder *encoder, DRM_DEBUG_KMS("\n"); + /* Backlight off, try both the enable GPIO and the MIPI seq. */ intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_OFF); + if (intel_dsi->gpio_backlight) + gpiod_set_value_cansleep(intel_dsi->gpio_backlight, 0); intel_panel_disable_backlight(old_conn_state); /* @@ -943,7 +950,7 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder, /* Assert reset */ intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_ASSERT_RESET); - /* Power off, try both CRC pmic gpio and VBT */ + /* Power off, try both the panel-enable GPIO and the MIPI seq. */ intel_dsi_msleep(intel_dsi, intel_dsi->panel_off_delay); intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_POWER_OFF); if (intel_dsi->gpio_panel) @@ -1542,6 +1549,8 @@ static void intel_dsi_encoder_destroy(struct drm_encoder *encoder) /* dispose of the gpios */ if (intel_dsi->gpio_panel) gpiod_put(intel_dsi->gpio_panel); + if (intel_dsi->gpio_backlight) + gpiod_put(intel_dsi->gpio_backlight); intel_encoder_destroy(encoder); } @@ -1821,6 +1830,7 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv) struct intel_connector *intel_connector; struct drm_connector *connector; struct drm_display_mode *current_mode, *fixed_mode; + struct pinctrl *pinctrl; enum port port; DRM_DEBUG_KMS("\n"); @@ -1921,7 +1931,7 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv) vlv_dphy_param_init(intel_dsi); /* - * In case of BYT with CRC PMIC, we need to use GPIO for + * In case of BYT or CHT with CRC PMIC, we need to use GPIO for * Panel control. */ if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && @@ -1934,6 +1944,34 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv) intel_dsi->gpio_panel = NULL; } } + /* + * In case of BYT (and only BYT) and using the SoC for PWM, we need + * to use the SoC's GPIOs for panel and backlight enable. When the + * GOP did not initialize the panel (HDMI inserted) we may need to + * also change the pinmux for the SoC's PWM0 pin from GPIO to PWM. + */ + if (IS_VALLEYVIEW(dev_priv) && + dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_SOC) { + intel_dsi->gpio_panel = gpiod_get(dev->dev, + "soc_panel_enable", + GPIOD_OUT_HIGH); + if (IS_ERR(intel_dsi->gpio_panel)) { + DRM_ERROR("Failed to own gpio for panel control\n"); + intel_dsi->gpio_panel = NULL; + } + + intel_dsi->gpio_backlight = gpiod_get(dev->dev, + "soc_backlight_enable", + GPIOD_OUT_HIGH); + if (IS_ERR(intel_dsi->gpio_backlight)) { + DRM_ERROR("Failed to own gpio for backlight control\n"); + intel_dsi->gpio_backlight = NULL; + } + + pinctrl = devm_pinctrl_get_select(dev->dev, "soc_pwm0"); + if (IS_ERR(pinctrl)) + DRM_ERROR("Failed to set pinmux to PWM\n"); + } drm_connector_init(dev, connector, &intel_dsi_connector_funcs, DRM_MODE_CONNECTOR_DSI);