From patchwork Tue Sep 10 15:28:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 1160412 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46STVg0x07z9sNw for ; Wed, 11 Sep 2019 01:30:03 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2393954AbfIJP37 (ORCPT ); Tue, 10 Sep 2019 11:29:59 -0400 Received: from relay3-d.mail.gandi.net ([217.70.183.195]:50889 "EHLO relay3-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728535AbfIJP34 (ORCPT ); Tue, 10 Sep 2019 11:29:56 -0400 X-Originating-IP: 86.250.200.211 Received: from localhost.localdomain (lfbn-1-17395-211.w86-250.abo.wanadoo.fr [86.250.200.211]) (Authenticated sender: paul.kocialkowski@bootlin.com) by relay3-d.mail.gandi.net (Postfix) with ESMTPSA id 8D84760008; Tue, 10 Sep 2019 15:29:53 +0000 (UTC) From: Paul Kocialkowski To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Mark Rutland , Thomas Petazzoni , Paul Kocialkowski Subject: [PATCH 3/3] gpio: syscon: Add support for the Xylon LogiCVC GPIOs Date: Tue, 10 Sep 2019 17:28:55 +0200 Message-Id: <20190910152855.111588-3-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20190910152855.111588-1-paul.kocialkowski@bootlin.com> References: <20190910152855.111588-1-paul.kocialkowski@bootlin.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The LogiCVC display hardware block comes with GPIO capabilities that must be exposed separately from the main driver (as GPIOs) for use with regulators and panels. A syscon is used to share the same regmap across the two drivers. Since the GPIO capabilities are pretty simple, add them to the syscon GPIO driver. Signed-off-by: Paul Kocialkowski --- drivers/gpio/gpio-syscon.c | 68 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/drivers/gpio/gpio-syscon.c b/drivers/gpio/gpio-syscon.c index 05c537ed73f1..3d435187940b 100644 --- a/drivers/gpio/gpio-syscon.c +++ b/drivers/gpio/gpio-syscon.c @@ -190,6 +190,70 @@ static const struct syscon_gpio_data keystone_dsp_gpio = { .set = keystone_gpio_set, }; +#define LOGICVC_CTRL_REG 0x40 +#define LOGICVC_CTRL_GPIO_SHIFT 11 +#define LOGICVC_CTRL_GPIO_BITS 5 + +#define LOGICVC_POWER_CTRL_REG 0x78 +#define LOGICVC_POWER_CTRL_GPIO_SHIFT 0 +#define LOGICVC_POWER_CTRL_GPIO_BITS 4 + +static void logicvc_gpio_offset(struct syscon_gpio_priv *priv, + unsigned offset, unsigned int *reg, + unsigned int *bit) +{ + if (offset >= LOGICVC_CTRL_GPIO_BITS) { + *reg = LOGICVC_POWER_CTRL_REG; + + /* To the (virtual) power ctrl offset. */ + offset -= LOGICVC_CTRL_GPIO_BITS; + /* To the actual bit offset in reg. */ + offset += LOGICVC_POWER_CTRL_GPIO_SHIFT; + } else { + *reg = LOGICVC_CTRL_REG; + + /* To the actual bit offset in reg. */ + offset += LOGICVC_CTRL_GPIO_SHIFT; + } + + *bit = 1 << offset; +} + +static int logicvc_gpio_get(struct gpio_chip *chip, unsigned offset) +{ + struct syscon_gpio_priv *priv = gpiochip_get_data(chip); + unsigned int reg; + unsigned int bit; + unsigned int value; + int ret; + + logicvc_gpio_offset(priv, offset, ®, &bit); + + ret = regmap_read(priv->syscon, reg, &value); + if (ret) + return ret; + + return !!(value & bit); +} + +static void logicvc_gpio_set(struct gpio_chip *chip, unsigned offset, int val) +{ + struct syscon_gpio_priv *priv = gpiochip_get_data(chip); + unsigned int reg; + unsigned int bit; + + logicvc_gpio_offset(priv, offset, ®, &bit); + + regmap_update_bits(priv->syscon, reg, bit, val ? bit : 0); +} + +static const struct syscon_gpio_data logicvc_3_gpio = { + .flags = GPIO_SYSCON_FEAT_OUT, + .bit_count = LOGICVC_CTRL_GPIO_BITS + LOGICVC_POWER_CTRL_GPIO_BITS, + .get = logicvc_gpio_get, + .set = logicvc_gpio_set, +}; + static const struct of_device_id syscon_gpio_ids[] = { { .compatible = "cirrus,ep7209-mctrl-gpio", @@ -203,6 +267,10 @@ static const struct of_device_id syscon_gpio_ids[] = { .compatible = "rockchip,rk3328-grf-gpio", .data = &rockchip_rk3328_gpio_mute, }, + { + .compatible = "xylon,logicvc-3.02.a-gpio", + .data = &logicvc_3_gpio, + }, { } }; MODULE_DEVICE_TABLE(of, syscon_gpio_ids);