diff mbox series

[v1,6/8] pinctrl: denverton: Provide Interrupt Status register offset

Message ID 20190723155633.65232-6-andriy.shevchenko@linux.intel.com
State New
Headers show
Series [v1,1/8] pinctrl: broxton: Provide Interrupt Status register offset | expand

Commit Message

Andy Shevchenko July 23, 2019, 3:56 p.m. UTC 
Since some of the GPIO controllers use different Interrupt Status offset,
it make sense to provide it explicitly in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/pinctrl/intel/pinctrl-denverton.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/pinctrl/intel/pinctrl-denverton.c b/drivers/pinctrl/intel/pinctrl-denverton.c
index 3a4932b557b4..fde83cd4aac5 100644
--- a/drivers/pinctrl/intel/pinctrl-denverton.c
+++ b/drivers/pinctrl/intel/pinctrl-denverton.c
@@ -15,8 +15,9 @@ 
 #include "pinctrl-intel.h"
 
 #define DNV_PAD_OWN	0x020
-#define DNV_HOSTSW_OWN	0x0C0
 #define DNV_PADCFGLOCK	0x090
+#define DNV_HOSTSW_OWN	0x0C0
+#define DNV_GPI_IS	0x100
 #define DNV_GPI_IE	0x120
 
 #define DNV_GPP(n, s, e)				\
@@ -32,6 +33,7 @@ 
 		.padown_offset = DNV_PAD_OWN,		\
 		.padcfglock_offset = DNV_PADCFGLOCK,	\
 		.hostown_offset = DNV_HOSTSW_OWN,	\
+		.is_offset = DNV_GPI_IS,		\
 		.ie_offset = DNV_GPI_IE,		\
 		.pin_base = (s),			\
 		.npins = ((e) - (s) + 1),		\