diff mbox series

[v1,5/8] pinctrl: sunrisepoint: Provide Interrupt Status register offset

Message ID 20190723155633.65232-5-andriy.shevchenko@linux.intel.com
State New
Headers show
Series [v1,1/8] pinctrl: broxton: Provide Interrupt Status register offset | expand

Commit Message

Andy Shevchenko July 23, 2019, 3:56 p.m. UTC 
Since some of the GPIO controllers use different Interrupt Status offset,
it make sense to provide it explicitly in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/pinctrl/intel/pinctrl-sunrisepoint.c | 2 ++
 1 file changed, 2 insertions(+)
diff mbox series

Patch

diff --git a/drivers/pinctrl/intel/pinctrl-sunrisepoint.c b/drivers/pinctrl/intel/pinctrl-sunrisepoint.c
index ccafeea4939c..44d7f50bbc82 100644
--- a/drivers/pinctrl/intel/pinctrl-sunrisepoint.c
+++ b/drivers/pinctrl/intel/pinctrl-sunrisepoint.c
@@ -18,6 +18,7 @@ 
 #define SPT_PAD_OWN	0x020
 #define SPT_PADCFGLOCK	0x0a0
 #define SPT_HOSTSW_OWN	0x0d0
+#define SPT_GPI_IS	0x100
 #define SPT_GPI_IE	0x120
 
 #define SPT_COMMUNITY(b, s, e)				\
@@ -26,6 +27,7 @@ 
 		.padown_offset = SPT_PAD_OWN,		\
 		.padcfglock_offset = SPT_PADCFGLOCK,	\
 		.hostown_offset = SPT_HOSTSW_OWN,	\
+		.is_offset = SPT_GPI_IS,		\
 		.ie_offset = SPT_GPI_IE,		\
 		.gpp_size = 24,				\
 		.gpp_num_padown_regs = 4,		\