From patchwork Thu Jun 6 09:56:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "J, KEERTHY" X-Patchwork-Id: 1111009 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="SZaZ7qlV"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45KLdl1L3Qz9sNk for ; Thu, 6 Jun 2019 19:56:11 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728263AbfFFJ4G (ORCPT ); Thu, 6 Jun 2019 05:56:06 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:57200 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728173AbfFFJ4F (ORCPT ); Thu, 6 Jun 2019 05:56:05 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x569txIO004422; Thu, 6 Jun 2019 04:55:59 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1559814959; bh=AFbZcGD05hnXKI5h5WdZTa40Gbo5LmksXVbRsgprfjs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=SZaZ7qlV/H0BkQpYCrqvW8UQn9ngDnj9a28A1vcAnhDZ+lPt9UebWRWd/swxnKg0B kEFv0aHafYcH4V8A/lW4z9MrcvN4ZYDukzxJ4uXMkJd5VSVomLA7KkWOMLh28pEXI8 id5irsGtF9X3Hq/Vb/SMptd6xhB6vp8LSRqWYYCo= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x569txOK001996 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 6 Jun 2019 04:55:59 -0500 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Thu, 6 Jun 2019 04:55:59 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Thu, 6 Jun 2019 04:55:59 -0500 Received: from a0393675ula.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id x569thst016817; Thu, 6 Jun 2019 04:55:55 -0500 From: Keerthy To: , , CC: , , , , , , , Subject: [RFC RESEND PATCH v2 3/4] arm64: dts: ti: am6-main: Add gpio nodes Date: Thu, 6 Jun 2019 15:26:19 +0530 Message-ID: <20190606095620.6211-4-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190606095620.6211-1-j-keerthy@ti.com> References: <20190606095620.6211-1-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add gpio0/1 nodes under main domain. They have 96 and 90 gpios respectively and all are capable of generating banked interrupts. Signed-off-by: Keerthy --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 32 ++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index 22154f401930..182efe70402b 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -350,4 +350,36 @@ ti,sci-rm-range-global-event = <0x1>; }; }; + + main_gpio0: main_gpio0@600000 { + compatible = "ti,am654-gpio", "ti,keystone-gpio"; + reg = <0x0 0x600000 0x0 0x100>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&intr_main_gpio>; + interrupts = <57 256>, <57 257>, <57 258>, <57 259>, <57 260>, + <57 261>; + interrupt-controller; + #interrupt-cells = <2>; + ti,ngpio = <96>; + ti,davinci-gpio-unbanked = <0>; + clocks = <&k3_clks 57 0>; + clock-names = "gpio"; + }; + + main_gpio1: main_gpio1@601000 { + compatible = "ti,am654-gpio", "ti,keystone-gpio"; + reg = <0x0 0x601000 0x0 0x100>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&intr_main_gpio>; + interrupts = <58 256>, <58 257>, <58 258>, <58 259>, <58 260>, + <58 261>; + interrupt-controller; + #interrupt-cells = <2>; + ti,ngpio = <90>; + ti,davinci-gpio-unbanked = <0>; + clocks = <&k3_clks 58 0>; + clock-names = "gpio"; + }; };