| Message ID | 20190604072001.9288-4-bjorn.andersson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | (Qualcomm) UFS device reset support | expand |
Quoting Bjorn Andersson (2019-06-04 00:20:01) > Specify the UFS device-reset gpio, so that the controller will issue a > reset of the UFS device. > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> > --- > arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts > index 2e78638eb73b..d116a0956a9c 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts > +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts > @@ -388,6 +388,8 @@ > &ufs_mem_hc { > status = "okay"; > > + device-reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; > + We had to do something similar on one particular brand of UFS that we had. I think it was an SK Hynix part that had trouble and wouldn't provision properly. Either way, we did this with a pinctrl toggle in the DTS where the "init" state has the UFS_RESET pin asserted and then "default" state has the pin deasserted. That was good enough to make this work. &ufs_mem_hc { pinctrl-names = "init", "default"; pinctrl-0 = <&ufs_dev_reset_assert>; pinctrl-1 = <&ufs_dev_reset_deassert>; }; ufs_dev_reset_assert: ufs_dev_reset_assert { config { pins = "ufs_reset"; bias-pull-down; /* default: pull down */ drive-strength = <8>; /* default: 3.1 mA */ output-low; /* active low reset */ }; }; ufs_dev_reset_deassert: ufs_dev_reset_deassert { config { pins = "ufs_reset"; bias-pull-down; /* default: pull down */ drive-strength = <8>; output-high; /* active low reset */ }; };
On Tue 04 Jun 09:22 PDT 2019, Stephen Boyd wrote: > Quoting Bjorn Andersson (2019-06-04 00:20:01) > > Specify the UFS device-reset gpio, so that the controller will issue a > > reset of the UFS device. > > > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> > > --- > > arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts > > index 2e78638eb73b..d116a0956a9c 100644 > > --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts > > +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts > > @@ -388,6 +388,8 @@ > > &ufs_mem_hc { > > status = "okay"; > > > > + device-reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; > > + > > We had to do something similar on one particular brand of UFS that we had. I > think it was an SK Hynix part that had trouble and wouldn't provision properly. > Either way, we did this with a pinctrl toggle in the DTS where the "init" state > has the UFS_RESET pin asserted and then "default" state has the pin deasserted. > That was good enough to make this work. > Thanks for pointing this out, I forgot to attribute these downstream changes. I can see how this works, but I must say I find it quite hackish. The downstream solution seems to have evolved this into naming these states and jumping between them (with the appropriate sleeps) during a host reset as well. But thanks for the confirmation that there's more than John's memory that needs this. Regards, Bjorn > &ufs_mem_hc { > pinctrl-names = "init", "default"; > pinctrl-0 = <&ufs_dev_reset_assert>; > pinctrl-1 = <&ufs_dev_reset_deassert>; > }; > > ufs_dev_reset_assert: ufs_dev_reset_assert { > config { > pins = "ufs_reset"; > bias-pull-down; /* default: pull down */ > drive-strength = <8>; /* default: 3.1 mA */ > output-low; /* active low reset */ > }; > }; > > ufs_dev_reset_deassert: ufs_dev_reset_deassert { > config { > pins = "ufs_reset"; > bias-pull-down; /* default: pull down */ > drive-strength = <8>; > output-high; /* active low reset */ > }; > };
On Tue, Jun 4, 2019 at 9:20 AM Bjorn Andersson <bjorn.andersson@linaro.org> wrote: > Specify the UFS device-reset gpio, so that the controller will issue a > reset of the UFS device. > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Yours, Linus Walleij
diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts index 2e78638eb73b..d116a0956a9c 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts @@ -388,6 +388,8 @@ &ufs_mem_hc { status = "okay"; + device-reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; + vcc-supply = <&vreg_l20a_2p95>; vcc-max-microamp = <600000>; };
Specify the UFS device-reset gpio, so that the controller will issue a reset of the UFS device. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> --- arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 2 ++ 1 file changed, 2 insertions(+)