From patchwork Sat Apr 13 16:54:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Ond=C5=99ej_Jirman?= X-Patchwork-Id: 1085178 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=reject dis=none) header.from=megous.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=megous.com header.i=@megous.com header.b="OWGBqZjc"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44hLV32P6vz9s47 for ; Sun, 14 Apr 2019 02:55:07 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727523AbfDMQy0 (ORCPT ); Sat, 13 Apr 2019 12:54:26 -0400 Received: from vps.xff.cz ([195.181.215.36]:49238 "EHLO vps.xff.cz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727440AbfDMQyZ (ORCPT ); Sat, 13 Apr 2019 12:54:25 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=megous.com; s=mail; t=1555174462; bh=ZOGzdottk2RIleoufnn4ifjkGAGSzeCzkeoCu7y/pEo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OWGBqZjc/8/KoY6E+eSWtL3ZZ54ewioajB0/Vu4xWQ69iY3uxz6wDs5lUdlnGjHbO j0F3/iVkUqz46L4hop0GXcArJC7xd7cyuy3DrgYpVLJheF317eYFapi9Ygg3zAXhQJ EaEaqOBu0z3X4rcRcfBRw0p/Ak1xjzU/GLQIjSNQ= From: megous@megous.com To: linux-sunxi@googlegroups.com, Maxime Ripard , Chen-Yu Tsai , Rob Herring , Linus Walleij Cc: Ondrej Jirman , David Airlie , Daniel Vetter , Mark Rutland , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Maxime Coquelin , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-gpio@vger.kernel.org Subject: [PATCH v4 9/9] arm64: dts: allwinner: h6: Add MMC1 pins Date: Sat, 13 Apr 2019 18:54:18 +0200 Message-Id: <20190413165418.27880-10-megous@megous.com> In-Reply-To: <20190413165418.27880-1-megous@megous.com> References: <20190413165418.27880-1-megous@megous.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Ondrej Jirman MMC1 is used on some H6 boards we want to support. Typical use is 4-bit SDIO interface with a WiFi chip. Add pin definitions for this use case. As this is the only possible configration for mmc1, make it the default one, too. Signed-off-by: Ondrej Jirman --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index e0dc4a05c1ba..bd37b849d3b7 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -243,6 +243,15 @@ bias-pull-up; }; + /omit-if-no-ref/ + mmc1_pins: mmc1-pins { + pins = "PG0", "PG1", "PG2", "PG3", + "PG4", "PG5"; + function = "mmc1"; + drive-strength = <30>; + bias-pull-up; + }; + mmc2_pins: mmc2-pins { pins = "PC1", "PC4", "PC5", "PC6", "PC7", "PC8", "PC9", "PC10", @@ -294,6 +303,8 @@ resets = <&ccu RST_BUS_MMC1>; reset-names = "ahb"; interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>;