| Message ID | 20181011113016.1044-1-marek.behun@nic.cz |
|---|---|
| State | New |
| Headers | show |
| Series | [pinctrl] pinctrl: armada-37xx: Correct mpp definitions | expand |
Hi Marek and Linus, On jeu., oct. 11 2018, Marek Behún <marek.behun@nic.cz> wrote: > This is a cleanup and fix of the patch by Ken Ma <make@marvell.com>. > > Fix the mpp definitions according to newest revision of the > specification: > - northbridge: > fix pmic1 gpio number to 7 > fix pmic0 gpio number to 6 > - southbridge > fix pcie1 group bit mask to BIT(5) | BIT(9) > fix ptp group bit mask to BIT(11) | BIT(12) | BIT(13) > add smi group with bit mask BIT(4) It seemms that this patch was never applied however it fixes some issues but in a wrong way and also it is also not complete. > > Signed-off-by: Marek Behún <marek.behun@nic.cz> > Cc: Gregory CLEMENT <gregory.clement@bootlin.com> > --- > .../bindings/pinctrl/marvell,armada-37xx-pinctrl.txt | 12 ++++++++---- > drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 9 +++++---- > 2 files changed, 13 insertions(+), 8 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt > index c7c088d2dd50..ae9d6b560bca 100644 > --- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt > +++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt > @@ -58,11 +58,11 @@ group pwm3 > - functions pwm, gpio > > group pmic1 > - - pin 17 > + - pin 7 > - functions pmic, gpio > > group pmic0 > - - pin 16 > + - pin 6 > - functions pmic, gpio > > group i2c2 > @@ -112,17 +112,21 @@ group usb2_drvvbus1 > - functions drvbus, gpio > > group sdio_sb > - - pins 60-64 > + - pins 60-65 > - functions sdio, gpio > > group rgmii > - - pins 42-55 > + - pins 42-53 > - functions mii, gpio > > group pcie1 > - pins 39-40 > - functions pcie, gpio > > +group smi > + - pins 54-55 > + - functions smi, gpio > + > group ptp > - pins 56-58 > - functions ptp, gpio > diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c > index aa48b3f23c7f..f3dbd56d7180 100644 > --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c > +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c > @@ -170,8 +170,8 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = { > PIN_GRP_GPIO("pwm1", 12, 1, BIT(4), "pwm"), > PIN_GRP_GPIO("pwm2", 13, 1, BIT(5), "pwm"), > PIN_GRP_GPIO("pwm3", 14, 1, BIT(6), "pwm"), > - PIN_GRP_GPIO("pmic1", 17, 1, BIT(7), "pmic"), > - PIN_GRP_GPIO("pmic0", 16, 1, BIT(8), "pmic"), > + PIN_GRP_GPIO("pmic1", 7, 1, BIT(7), "pmic"), > + PIN_GRP_GPIO("pmic0", 6, 1, BIT(8), "pmic"), > PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"), > PIN_GRP_GPIO("i2c1", 0, 2, BIT(10), "i2c"), > PIN_GRP_GPIO("spi_cs1", 17, 1, BIT(12), "spi"), > @@ -195,8 +195,9 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = { > PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"), > PIN_GRP_GPIO("sdio_sb", 24, 6, BIT(2), "sdio"), > PIN_GRP_GPIO("rgmii", 6, 12, BIT(3), "mii"), > - PIN_GRP_GPIO("pcie1", 3, 2, BIT(4), "pcie"), > - PIN_GRP_GPIO("ptp", 20, 3, BIT(5), "ptp"), > + PIN_GRP_GPIO("smi", 18, 2, BIT(4), "smi"), > + PIN_GRP_GPIO("pcie1", 3, 2, BIT(5) | BIT(9), "pcie"), Actually those 2 pins are no more a group but can be configured individually. It should be: PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"), PIN_GRP_GPIO("pcie1_clkreq", 4, 1, BIT(9), "pcie"), I am going to send a new patch more complete to fix all this. Gregory > + PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"), > PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"), > PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"), > PIN_GRP_GPIO_3("mii_col", 23, 1, BIT(8) | BIT(14), 0, BIT(8), BIT(14), > -- > 2.16.4 >
On Sun, 16 Dec 2018 10:46:30 +0100 Gregory CLEMENT <gregory.clement@bootlin.com> wrote: > It seemms that this patch was never applied however it fixes some > issues but in a wrong way and also it is also not complete. Hi Gregory, what do you mean by "in a wrong way"? Marek
Hi Marek, On dim., déc. 16 2018, Marek Behun <marek.behun@nic.cz> wrote: > On Sun, 16 Dec 2018 10:46:30 +0100 > Gregory CLEMENT <gregory.clement@bootlin.com> wrote: > >> It seemms that this patch was never applied however it fixes some >> issues but in a wrong way and also it is also not complete. > > Hi Gregory, > what do you mean by "in a wrong way"? I think you missed the second part of the email, I add it back: > @@ -195,8 +195,9 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = { > PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"), > PIN_GRP_GPIO("sdio_sb", 24, 6, BIT(2), "sdio"), > PIN_GRP_GPIO("rgmii", 6, 12, BIT(3), "mii"), > - PIN_GRP_GPIO("pcie1", 3, 2, BIT(4), "pcie"), > - PIN_GRP_GPIO("ptp", 20, 3, BIT(5), "ptp"), > + PIN_GRP_GPIO("smi", 18, 2, BIT(4), "smi"), > + PIN_GRP_GPIO("pcie1", 3, 2, BIT(5) | BIT(9), "pcie"), Actually those 2 pins are no more a group but can be configured individually. It should be: PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"), PIN_GRP_GPIO("pcie1_clkreq", 4, 1, BIT(9), "pcie"), Gregory
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt index c7c088d2dd50..ae9d6b560bca 100644 --- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt @@ -58,11 +58,11 @@ group pwm3 - functions pwm, gpio group pmic1 - - pin 17 + - pin 7 - functions pmic, gpio group pmic0 - - pin 16 + - pin 6 - functions pmic, gpio group i2c2 @@ -112,17 +112,21 @@ group usb2_drvvbus1 - functions drvbus, gpio group sdio_sb - - pins 60-64 + - pins 60-65 - functions sdio, gpio group rgmii - - pins 42-55 + - pins 42-53 - functions mii, gpio group pcie1 - pins 39-40 - functions pcie, gpio +group smi + - pins 54-55 + - functions smi, gpio + group ptp - pins 56-58 - functions ptp, gpio diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index aa48b3f23c7f..f3dbd56d7180 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -170,8 +170,8 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = { PIN_GRP_GPIO("pwm1", 12, 1, BIT(4), "pwm"), PIN_GRP_GPIO("pwm2", 13, 1, BIT(5), "pwm"), PIN_GRP_GPIO("pwm3", 14, 1, BIT(6), "pwm"), - PIN_GRP_GPIO("pmic1", 17, 1, BIT(7), "pmic"), - PIN_GRP_GPIO("pmic0", 16, 1, BIT(8), "pmic"), + PIN_GRP_GPIO("pmic1", 7, 1, BIT(7), "pmic"), + PIN_GRP_GPIO("pmic0", 6, 1, BIT(8), "pmic"), PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"), PIN_GRP_GPIO("i2c1", 0, 2, BIT(10), "i2c"), PIN_GRP_GPIO("spi_cs1", 17, 1, BIT(12), "spi"), @@ -195,8 +195,9 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = { PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"), PIN_GRP_GPIO("sdio_sb", 24, 6, BIT(2), "sdio"), PIN_GRP_GPIO("rgmii", 6, 12, BIT(3), "mii"), - PIN_GRP_GPIO("pcie1", 3, 2, BIT(4), "pcie"), - PIN_GRP_GPIO("ptp", 20, 3, BIT(5), "ptp"), + PIN_GRP_GPIO("smi", 18, 2, BIT(4), "smi"), + PIN_GRP_GPIO("pcie1", 3, 2, BIT(5) | BIT(9), "pcie"), + PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"), PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"), PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"), PIN_GRP_GPIO_3("mii_col", 23, 1, BIT(8) | BIT(14), 0, BIT(8), BIT(14),
This is a cleanup and fix of the patch by Ken Ma <make@marvell.com>. Fix the mpp definitions according to newest revision of the specification: - northbridge: fix pmic1 gpio number to 7 fix pmic0 gpio number to 6 - southbridge fix pcie1 group bit mask to BIT(5) | BIT(9) fix ptp group bit mask to BIT(11) | BIT(12) | BIT(13) add smi group with bit mask BIT(4) Signed-off-by: Marek Behún <marek.behun@nic.cz> Cc: Gregory CLEMENT <gregory.clement@bootlin.com> --- .../bindings/pinctrl/marvell,armada-37xx-pinctrl.txt | 12 ++++++++---- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 9 +++++---- 2 files changed, 13 insertions(+), 8 deletions(-)