From patchwork Mon Oct 8 19:14:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 980756 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="GsvmHcKX"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42TVRj00CGz9sBh for ; Tue, 9 Oct 2018 06:14:56 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727853AbeJIC2D (ORCPT ); Mon, 8 Oct 2018 22:28:03 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:46192 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727350AbeJIC2C (ORCPT ); Mon, 8 Oct 2018 22:28:02 -0400 Received: by mail-pg1-f194.google.com with SMTP id a5-v6so8226272pgv.13 for ; Mon, 08 Oct 2018 12:14:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=v+EkBGJYgP5l8roNkAIcHxwpqxLvNbg8+WmAulqw8rE=; b=GsvmHcKXZLLg9D8JsGEhcSA4tY7FRDhnnZuE4crvm3+w/aW+70L1Z7AXOqjp/Xz0Qx HapGzRngWQUsqL9f3l8balsF27eU87IglMFxJacj8ZSJOEur+H6W+bquJmuAP+odSDYA 1tGnYedayjB/yL6UZQ/loQPEgmL3aoiDgtQXc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=v+EkBGJYgP5l8roNkAIcHxwpqxLvNbg8+WmAulqw8rE=; b=DJ2SaPrHWdPTl/7m9bmYLvGqJGtVl5iYabA/OIgP350G9nU2dZKo/t1sbyRqSusPQO QGvr3QvBhQQlflcj6fOKRFo8cP/SiX4kuFNQ6cxYhqaijgWXKC+Q9sc9Mxu6Sg0HzjNh RyXGag1g2ZpNROcDK1/Ino37mpf9UnNIQaz3/RAn2DZL74i771KERi//bQwsJ5vwSPV6 JvDFKlP2oDsuqqRZgCXYqTf6TZovzIGFV5BW1nsL4Ui/7PeCracUzuchbz/1ltfq8UJX Md+BtpORKGevBoxk1rhuQPKvYf05SPuj7bCKhaXAHDbF9lXaNRV78WjF6KlkkXcdlqOm QynA== X-Gm-Message-State: ABuFfojdTMBWIxow2g8SbJUq5Dgnfb/5QaOoU/lyZ2HWmW3yk7HtqJ76 xHwZkgtZWXLXuDYP48ebZJx2 X-Google-Smtp-Source: ACcGV602BVw9zB7/SpyW34tfwwfJ4y/mI9zsrT1Kde+jE5orFFDc56dVXl3+SBlOskVOTniW0qLLpw== X-Received: by 2002:a63:5816:: with SMTP id m22-v6mr22077083pgb.332.1539026087434; Mon, 08 Oct 2018 12:14:47 -0700 (PDT) Received: from localhost.localdomain ([2405:204:73c6:20ea:9fd:1785:d893:1e98]) by smtp.gmail.com with ESMTPSA id a15-v6sm15648035pff.8.2018.10.08.12.14.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 08 Oct 2018 12:14:47 -0700 (PDT) From: Manivannan Sadhasivam To: sean.wang@mediatek.com, linus.walleij@linaro.org, matthias.bgg@gmail.com, robh+dt@kernel.org Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, amit.kucheria@linaro.org, Manivannan Sadhasivam Subject: [PATCH 3/5] arm64: dts: mediatek: x20: Add pinmux support for UART1 Date: Tue, 9 Oct 2018 00:44:09 +0530 Message-Id: <20181008191411.32555-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181008191411.32555-1-manivannan.sadhasivam@linaro.org> References: <20181008191411.32555-1-manivannan.sadhasivam@linaro.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add pinmux support for UART1 on MediatekX20 Development board based on Mediatek MT6797 SoC. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/mediatek/mt6797-x20-dev.dts | 2 ++ arch/arm64/boot/dts/mediatek/mt6797.dtsi | 7 +++++++ 2 files changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt6797-x20-dev.dts b/arch/arm64/boot/dts/mediatek/mt6797-x20-dev.dts index 742938a1a548..13939d55b85b 100644 --- a/arch/arm64/boot/dts/mediatek/mt6797-x20-dev.dts +++ b/arch/arm64/boot/dts/mediatek/mt6797-x20-dev.dts @@ -30,4 +30,6 @@ &uart1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins_a>; }; diff --git a/arch/arm64/boot/dts/mediatek/mt6797.dtsi b/arch/arm64/boot/dts/mediatek/mt6797.dtsi index 231230d32d09..a64bb84bdec3 100644 --- a/arch/arm64/boot/dts/mediatek/mt6797.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6797.dtsi @@ -141,6 +141,13 @@ "iocfgr", "iocfgt"; gpio-controller; #gpio-cells = <2>; + + uart1_pins_a: uart1 { + pins1 { + pinmux = , + ; + }; + }; }; scpsys: scpsys@10006000 {