From patchwork Fri Aug 31 00:58:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 964256 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="R4C3aQsa"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 421gwh56Lvz9s1c for ; Fri, 31 Aug 2018 10:59:00 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726959AbeHaFDo (ORCPT ); Fri, 31 Aug 2018 01:03:44 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:45896 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726345AbeHaFDo (ORCPT ); Fri, 31 Aug 2018 01:03:44 -0400 Received: by mail-pf1-f195.google.com with SMTP id i26-v6so4655492pfo.12 for ; Thu, 30 Aug 2018 17:58:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=xiUYqLA8pwRZZ+8OgMWkETx5wfqrEJiqGUlOhx1CtX4=; b=R4C3aQsaa0CfGeboDyrGQHh0hreGPRhiqOYdjRIuGW3YRpUaW8NX8AnbPAe7UYzueu tbD9TMscgkbIB7b4W4ZaAGhXB56Rkt0t8LR7Y0+IVx4QtdtgGGkoAr/MmNZLOBZS8vZe KSqVaOP5XcpjmXknrKLn/eLN8uJvvmqcu1Fbw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=xiUYqLA8pwRZZ+8OgMWkETx5wfqrEJiqGUlOhx1CtX4=; b=srIpZsTeCSdHlG5fFQCSTFguVd2k1H8Lv+wIywoQo6TVDNnoW2Vu0ULO8hnJqshuGe ov5tPoXGSiC+7yQkvMeTYbOEQblR7PS0zWKJZZYvCr6/LPLAmba9TudIootkRUGOuYGS 0sTekBi0h48hHq4hpoXpZHS+E5R7AMxotO81SxOFbHrzAdlIzGdcIbILFWTNBd7js3Y0 382FMXrVT+oL2b0YYub8He7/+8A/6g25wMW5iOgMlinIr4nsWDEUTXo/D52eh6BUOVEu Eo3ctbNONx9X16qGJqME4HxeCZmG/8zi0RyGJx0NVb1v5N2u7OLgSpAbNU+jtDW7XrRJ PkRA== X-Gm-Message-State: APzg51Ah7NYP/IalaggYgJlnmHpkdY+trODLsPbaCpyY3BrHSr+a9PdD LceuZG5B+gR53j+FfmaLq7Uedr3yIgA= X-Google-Smtp-Source: ANB0VdacGlOtTDLiMZegyPCyiJ5f2sTdSi4Eot/EhwLiHmHlS0i2wzaDC1UFfKP2eRCf6fBWF/WyGg== X-Received: by 2002:a63:8442:: with SMTP id k63-v6mr12002531pgd.388.1535677133443; Thu, 30 Aug 2018 17:58:53 -0700 (PDT) Received: from smtp.gmail.com ([2620:15c:202:201:7e28:b9f3:6afc:5326]) by smtp.gmail.com with ESMTPSA id 83-v6sm17929914pft.40.2018.08.30.17.58.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Aug 2018 17:58:52 -0700 (PDT) From: Stephen Boyd To: Linus Walleij Cc: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-msm@vger.kernel.org, Bjorn Andersson , Doug Anderson Subject: [PATCH] pinctrl: qcom: spmi-mpp: Fix drive strength setting Date: Thu, 30 Aug 2018 17:58:52 -0700 Message-Id: <20180831005852.156465-1-swboyd@chromium.org> X-Mailer: git-send-email 2.19.0.rc1.350.ge57e33dbd1-goog MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org It looks like we parse the drive strength setting here, but never actually write it into the hardware to update it. Parse the setting and then write it at the end of the pinconf setting function so that it actually sticks in the hardware. Fixes: 0e948042c420 ("pinctrl: qcom: spmi-mpp: Implement support for sink mode") Cc: Bjorn Andersson Cc: Doug Anderson Signed-off-by: Stephen Boyd Reviewed-by: Bjorn Andersson --- drivers/pinctrl/qcom/pinctrl-spmi-mpp.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c b/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c index 6556dbeae65e..1793a4d05e15 100644 --- a/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c @@ -455,7 +455,7 @@ static int pmic_mpp_config_set(struct pinctrl_dev *pctldev, unsigned int pin, pad->dtest = arg; break; case PIN_CONFIG_DRIVE_STRENGTH: - arg = pad->drive_strength; + pad->drive_strength = arg; break; case PMIC_MPP_CONF_AMUX_ROUTE: if (arg >= PMIC_MPP_AMUX_ROUTE_ABUS4) @@ -502,6 +502,10 @@ static int pmic_mpp_config_set(struct pinctrl_dev *pctldev, unsigned int pin, if (ret < 0) return ret; + ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_SINK_CTL, pad->drive_strength); + if (ret < 0) + return ret; + val = pad->is_enabled << PMIC_MPP_REG_MASTER_EN_SHIFT; return pmic_mpp_write(state, pad, PMIC_MPP_REG_EN_CTL, val);