| Message ID | 20180726165905.80538-1-andriy.shevchenko@linux.intel.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v1] pinctrl: cannonlake: Fix community ordering for H variant | expand |
On Thu, Jul 26, 2018 at 07:59:05PM +0300, Andy Shevchenko wrote: > The driver was written based on an assumption that BIOS provides > unordered communities in ACPI DSDT. Nevertheless, it seems that > BIOS getting fixed before being provisioned to OxM:s. > So does driver. > > BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=199911 > Reported-by: Marc Landolt <2009@marclandolt.ch> > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Thu, Jul 26, 2018 at 6:58 PM Andy Shevchenko <andriy.shevchenko@linux.intel.com> wrote: > The driver was written based on an assumption that BIOS provides > unordered communities in ACPI DSDT. Nevertheless, it seems that > BIOS getting fixed before being provisioned to OxM:s. > So does driver. > > BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=199911 > Reported-by: Marc Landolt <2009@marclandolt.ch> > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > Cc: Mika Westerberg <mika.westerberg@linux.intel.com> > Fixes: a663ccf0fea1 ("pinctrl: intel: Add Intel Cannon Lake PCH-H pin controller support") Patch applied with Mika's ACK. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/pinctrl/intel/pinctrl-cannonlake.c b/drivers/pinctrl/intel/pinctrl-cannonlake.c index 71ad67b8fc35..fb1afe55bf53 100644 --- a/drivers/pinctrl/intel/pinctrl-cannonlake.c +++ b/drivers/pinctrl/intel/pinctrl-cannonlake.c @@ -444,12 +444,8 @@ static const struct intel_function cnlh_functions[] = { static const struct intel_community cnlh_communities[] = { CNL_COMMUNITY(0, 0, 50, cnlh_community0_gpps), CNL_COMMUNITY(1, 51, 154, cnlh_community1_gpps), - /* - * ACPI MMIO resources are returned in reverse order for - * communities 3 and 4. - */ - CNL_COMMUNITY(3, 155, 248, cnlh_community3_gpps), - CNL_COMMUNITY(2, 249, 298, cnlh_community4_gpps), + CNL_COMMUNITY(2, 155, 248, cnlh_community3_gpps), + CNL_COMMUNITY(3, 249, 298, cnlh_community4_gpps), }; static const struct intel_pinctrl_soc_data cnlh_soc_data = {
The driver was written based on an assumption that BIOS provides unordered communities in ACPI DSDT. Nevertheless, it seems that BIOS getting fixed before being provisioned to OxM:s. So does driver. BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=199911 Reported-by: Marc Landolt <2009@marclandolt.ch> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Fixes: a663ccf0fea1 ("pinctrl: intel: Add Intel Cannon Lake PCH-H pin controller support") --- drivers/pinctrl/intel/pinctrl-cannonlake.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-)