From patchwork Thu Sep 28 09:56:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 819507 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="SykCLcOe"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3y2qsJ5QLZz9t3h for ; Thu, 28 Sep 2017 19:59:00 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752726AbdI1J4y (ORCPT ); Thu, 28 Sep 2017 05:56:54 -0400 Received: from mail-qt0-f196.google.com ([209.85.216.196]:50452 "EHLO mail-qt0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752577AbdI1J4w (ORCPT ); Thu, 28 Sep 2017 05:56:52 -0400 Received: by mail-qt0-f196.google.com with SMTP id f15so855907qtf.7; Thu, 28 Sep 2017 02:56:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Pod7A1G1enqp/iMUgOtQzyLcsUcldnw12VR/XEHJZkU=; b=SykCLcOe8+x9RQbcoYbk1XFirz2mg5rk5iJM5o3SFPMXlIHBpaiH75vUpnMnfS0sJZ fpO5bP3zbO3uNPQECGR4C8Qn9RfDZ9E0iH4bxLuF7X7I8xTRYOEHAX+hQkfDwk0SLLmq EZTEixGpKAVIZJd+znzHnPpeBSR/dt1Jjc6lnd3/ZhmfmfFdPswleWoFgR/gb5e5lXLp 9nwKlhWLHecbY3mhg0Vh64PLJJAEU99f1a8ewHvuJGTCObXNQajrP5tFsEcMN5/lYosg EA6MHwB2T7vouCoCl9k0xo2uuvw4Z45+7DHNYfPO/JgqP8wDmf1vY7RJizzo/E1bBUxH rdHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Pod7A1G1enqp/iMUgOtQzyLcsUcldnw12VR/XEHJZkU=; b=MBkYf3DBFg6/3/z2aeaQyeS08oShXxuREpy+mOhjGQPJXOPfLevsIzh0hsq4ig1MV6 FMMPuTuC7UygIMDnazAMzDBEMvvH3uwYchqJR6DnAwWSNInD4Fc1dSg4jvRZqs9DpdgZ OT0EGglfMjEt43rR8I8VGc9r3kTx+BvPTkBt9OLgD3W/DSi59lttPcT6t5rtJSv7bRV+ oiL1z1MdyMx/TueETsREWY4ajlLe5uO41iOns24hIwTwGSZylCyy2wdZdffTM2GpliPc TorMM58IJeM/nPsr6MGWt3eEDGKCY2mIqq0B9W8qGAf2CfDk4wODDg2Gyp7o8ZL3dt7A kzew== X-Gm-Message-State: AMCzsaUUDE2VQejYvVpLz7cstc7apJAqV9roY0PowBWtkBV+hp6clsqb I4+eaccYfLQjoqLz98hd3CQ= X-Google-Smtp-Source: AOwi7QCFKW0kr3E9UqZhKjNfgr2P62TlvNDT8ldqy+xZYovbK3V5cPn8KurpBTJufGjiwGoR/MtTcg== X-Received: by 10.237.36.225 with SMTP id u30mr16495qtc.11.1506592611253; Thu, 28 Sep 2017 02:56:51 -0700 (PDT) Received: from localhost (p200300E41BCC8100EA54DC343767CF80.dip0.t-ipconnect.de. [2003:e4:1bcc:8100:ea54:dc34:3767:cf80]) by smtp.gmail.com with ESMTPSA id m66sm739671qkf.23.2017.09.28.02.56.50 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 28 Sep 2017 02:56:50 -0700 (PDT) From: Thierry Reding To: Linus Walleij Cc: Jonathan Hunter , linux-gpio@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 07/16] gpio: Move irq_chained_parent to struct gpio_irq_chip Date: Thu, 28 Sep 2017 11:56:19 +0200 Message-Id: <20170928095628.21966-8-thierry.reding@gmail.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20170928095628.21966-1-thierry.reding@gmail.com> References: <20170928095628.21966-1-thierry.reding@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Thierry Reding In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: Thierry Reding --- drivers/gpio/gpiolib.c | 8 ++------ include/linux/gpio/driver.h | 4 ---- 2 files changed, 2 insertions(+), 10 deletions(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index bbad2eae30e2..7a62f4a63635 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -1569,7 +1569,8 @@ static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gpiochip, irq_set_chained_handler_and_data(parent_irq, parent_handler, gpiochip); - gpiochip->irq_chained_parent = parent_irq; + gpiochip->irq.parents = &parent_irq; + gpiochip->irq.num_parents = 1; } /* Set the parent IRQ for all affected IRQs */ @@ -1842,11 +1843,6 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) acpi_gpiochip_free_interrupts(gpiochip); - if (gpiochip->irq_chained_parent) { - irq_set_chained_handler(gpiochip->irq_chained_parent, NULL); - irq_set_handler_data(gpiochip->irq_chained_parent, NULL); - } - if (gpiochip->irq.chip) { struct gpio_irq_chip *irq = &gpiochip->irq; unsigned int i; diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index bcf93afddfa6..c3eafd874884 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -176,9 +176,6 @@ static inline struct gpio_irq_chip *to_gpio_irq_chip(struct irq_chip *chip) * safely. * @bgpio_dir: shadowed direction register for generic GPIO to clear/set * direction safely. - * @irq_chained_parent: GPIO IRQ chip parent/bank linux irq number, - * provided by GPIO driver for chained interrupt (not for nested - * interrupts). * @irq_nested: True if set the interrupt handling is nested. * @irq_need_valid_mask: If set core allocates @irq_valid_mask with all * bits set to one @@ -251,7 +248,6 @@ struct gpio_chip { * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib * to handle IRQs for most practical cases. */ - unsigned int irq_chained_parent; bool irq_nested; bool irq_need_valid_mask; unsigned long *irq_valid_mask;