From patchwork Mon Jul 4 19:52:20 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 644389 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3rjyNY0HMYz9t0T for ; Tue, 5 Jul 2016 05:52:45 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=cogentembedded-com.20150623.gappssmtp.com header.i=@cogentembedded-com.20150623.gappssmtp.com header.b=kTejq2c2; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753875AbcGDTw3 (ORCPT ); Mon, 4 Jul 2016 15:52:29 -0400 Received: from mail-lf0-f52.google.com ([209.85.215.52]:35230 "EHLO mail-lf0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753870AbcGDTw1 (ORCPT ); Mon, 4 Jul 2016 15:52:27 -0400 Received: by mail-lf0-f52.google.com with SMTP id l188so122474977lfe.2 for ; Mon, 04 Jul 2016 12:52:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cogentembedded-com.20150623.gappssmtp.com; s=20150623; h=from:to:subject:date:message-id:organization:user-agent:in-reply-to :references:mime-version:content-transfer-encoding; bh=WCxMKZKgvg8/oGEE6WGGo7wV+tRYDnS/YqmKbXqvR2k=; b=kTejq2c2g7ZgOLzGq7jM+foZGe+GZW4BRj9OTDZjn0e5UWkp+gCZBdBlbifSfzxl2X 21k9bDXgIGwUsGHNTM+Wn5cQ5w1snyo90Xkbp8ALGDpxIimQ7Cc7NMXTU2w4vsvLIzys rMbFqAzrsLATbtzUassJcQw8l+CC5X8WHYj7mpJkwPfElBYbBYNP+EFir+/Ljmsfn3z+ MgmJm9tHNlAb6eKuGTMNVnmKrS0dqbWK95024iWuQM2puO184/RiEAY+HwNJPbGudpOG /dtfYwbCDTISJPRO5GXWGzVS24xqCzMTaJ0U/fidxWi2M23pEey24PLSQApz1bAWuyvW uV1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:subject:date:message-id:organization :user-agent:in-reply-to:references:mime-version :content-transfer-encoding; bh=WCxMKZKgvg8/oGEE6WGGo7wV+tRYDnS/YqmKbXqvR2k=; b=FoJj4jpuD5Nu+z/NsmcCAmVfpreApTJyWiEO055bpQfifCtNRP5dcbrtQNoakA/8G/ RW3Hr4QY19XQbs+bZ1AI+RvlfwGQVKWYWBv0fh/eS7tdN2MrYAVJHfXWAu8NlyUvI8SK gmt6Kzg7SlUaVyaDLg4qabzxEhCbr8sWm3X7WyVHS3m3QvQzMAgpqqtwvDv6cN0AhP45 kYQZvJtlY4HfNdxbhfeaGZHBwgkhV8+NE6FntZQ7rjuQbuQAwJlh2H+8+/5huazSYoYh eDr62llJyh8PvmmxBXkVdMxErww7JwJfFZ9BkSrEDByeeRsaVfzjBV759nJwkO7WuuC0 GLcA== X-Gm-Message-State: ALyK8tKuC9yQXr3Wkv+xrLvL3h26yxGXgu/rdod4ElUuBkVSkVTAhLaR+OwbyoYkQfbHbQ== X-Received: by 10.25.145.2 with SMTP id t2mr3928702lfd.163.1467661945428; Mon, 04 Jul 2016 12:52:25 -0700 (PDT) Received: from wasted.cogentembedded.com ([31.173.85.102]) by smtp.gmail.com with ESMTPSA id n7sm4879537lfb.31.2016.07.04.12.52.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Jul 2016 12:52:24 -0700 (PDT) From: Sergei Shtylyov To: linus.walleij@linaro.org, linux-renesas-soc@vger.kernel.org, laurent.pinchart@ideasonboard.com, linux-gpio@vger.kernel.org, geert+renesas@glider.be Subject: [PATCH] pinctrl: sh-pfc: r8a7792: add EtherAVB pin groups Date: Mon, 04 Jul 2016 22:52:20 +0300 Message-ID: <1734030.FmmGtJt7OA@wasted.cogentembedded.com> Organization: Cogent Embedded Inc. User-Agent: KMail/4.14.10 (Linux/4.4.13-200.fc22.x86_64; KDE/4.14.17; x86_64; ; ) In-Reply-To: <1501145.5ro9yfox2Z@wasted.cogentembedded.com> References: <1501145.5ro9yfox2Z@wasted.cogentembedded.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add the EtherAVB pin groups to the R8A7792 PFC driver. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven --- The patch is against the 'devel' branch of Linus Walleij's 'linux-pinctrl.git' repo plus my 2 PFC patches posted last week... drivers/pinctrl/sh-pfc/pfc-r8a7792.c | 91 +++++++++++++++++++++++++++++++++++ 1 file changed, 91 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Index: linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7792.c =================================================================== --- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/pfc-r8a7792.c +++ linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7792.c @@ -728,6 +728,81 @@ static const struct sh_pfc_pin pinmux_pi PINMUX_GPIO_GP_ALL(), }; +/* - AVB -------------------------------------------------------------------- */ +static const unsigned int avb_link_pins[] = { + RCAR_GP_PIN(7, 9), +}; +static const unsigned int avb_link_mux[] = { + AVB_LINK_MARK, +}; +static const unsigned int avb_magic_pins[] = { + RCAR_GP_PIN(7, 10), +}; +static const unsigned int avb_magic_mux[] = { + AVB_MAGIC_MARK, +}; +static const unsigned int avb_phy_int_pins[] = { + RCAR_GP_PIN(7, 11), +}; +static const unsigned int avb_phy_int_mux[] = { + AVB_PHY_INT_MARK, +}; +static const unsigned int avb_mdio_pins[] = { + RCAR_GP_PIN(7, 7), RCAR_GP_PIN(7, 8), +}; +static const unsigned int avb_mdio_mux[] = { + AVB_MDC_MARK, AVB_MDIO_MARK, +}; +static const unsigned int avb_mii_pins[] = { + RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15), RCAR_GP_PIN(6, 16), + RCAR_GP_PIN(6, 12), + + RCAR_GP_PIN(6, 2), RCAR_GP_PIN(6, 3), RCAR_GP_PIN(6, 4), + RCAR_GP_PIN(6, 5), + + RCAR_GP_PIN(6, 10), RCAR_GP_PIN(6, 0), RCAR_GP_PIN(6, 1), + RCAR_GP_PIN(7, 12), RCAR_GP_PIN(6, 13), RCAR_GP_PIN(7, 5), + RCAR_GP_PIN(7, 0), RCAR_GP_PIN(6, 11), +}; +static const unsigned int avb_mii_mux[] = { + AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK, + AVB_TXD3_MARK, + + AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK, + AVB_RXD3_MARK, + + AVB_RX_ER_MARK, AVB_RX_CLK_MARK, AVB_RX_DV_MARK, + AVB_CRS_MARK, AVB_TX_EN_MARK, AVB_TX_ER_MARK, + AVB_TX_CLK_MARK, AVB_COL_MARK, +}; +static const unsigned int avb_gmii_pins[] = { + RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15), RCAR_GP_PIN(6, 16), + RCAR_GP_PIN(6, 12), RCAR_GP_PIN(7, 1), RCAR_GP_PIN(7, 2), + RCAR_GP_PIN(7, 3), RCAR_GP_PIN(7, 4), + + RCAR_GP_PIN(6, 2), RCAR_GP_PIN(6, 3), RCAR_GP_PIN(6, 4), + RCAR_GP_PIN(6, 5), RCAR_GP_PIN(6, 6), RCAR_GP_PIN(6, 7), + RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9), + + RCAR_GP_PIN(6, 10), RCAR_GP_PIN(6, 0), RCAR_GP_PIN(6, 1), + RCAR_GP_PIN(7, 12), RCAR_GP_PIN(7, 6), RCAR_GP_PIN(7, 13), + RCAR_GP_PIN(6, 13), RCAR_GP_PIN(7, 5), RCAR_GP_PIN(7, 0), + RCAR_GP_PIN(6, 11), +}; +static const unsigned int avb_gmii_mux[] = { + AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK, + AVB_TXD3_MARK, AVB_TXD4_MARK, AVB_TXD5_MARK, + AVB_TXD6_MARK, AVB_TXD7_MARK, + + AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK, + AVB_RXD3_MARK, AVB_RXD4_MARK, AVB_RXD5_MARK, + AVB_RXD6_MARK, AVB_RXD7_MARK, + + AVB_RX_ER_MARK, AVB_RX_CLK_MARK, AVB_RX_DV_MARK, + AVB_CRS_MARK, AVB_GTX_CLK_MARK, AVB_GTXREFCLK_MARK, + AVB_TX_EN_MARK, AVB_TX_ER_MARK, AVB_TX_CLK_MARK, + AVB_COL_MARK, +}; /* - INTC ------------------------------------------------------------------- */ static const unsigned int intc_irq0_pins[] = { /* IRQ0 */ @@ -853,6 +928,12 @@ static const unsigned int scif3_clk_mux[ }; static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(avb_link), + SH_PFC_PIN_GROUP(avb_magic), + SH_PFC_PIN_GROUP(avb_phy_int), + SH_PFC_PIN_GROUP(avb_mdio), + SH_PFC_PIN_GROUP(avb_mii), + SH_PFC_PIN_GROUP(avb_gmii), SH_PFC_PIN_GROUP(intc_irq0), SH_PFC_PIN_GROUP(intc_irq1), SH_PFC_PIN_GROUP(intc_irq2), @@ -872,6 +953,15 @@ static const struct sh_pfc_pin_group pin SH_PFC_PIN_GROUP(scif3_clk), }; +static const char * const avb_groups[] = { + "avb_link", + "avb_magic", + "avb_phy_int", + "avb_mdio", + "avb_mii", + "avb_gmii", +}; + static const char * const intc_groups[] = { "intc_irq0", "intc_irq1", @@ -902,6 +992,7 @@ static const char * const scif3_groups[] }; static const struct sh_pfc_function pinmux_functions[] = { + SH_PFC_FUNCTION(avb), SH_PFC_FUNCTION(intc), SH_PFC_FUNCTION(lbsc), SH_PFC_FUNCTION(scif0),