From patchwork Mon Oct 16 15:27:49 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 826379 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yG2Jr4THtz9t3w for ; Tue, 17 Oct 2017 02:28:12 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753837AbdJPP2G (ORCPT ); Mon, 16 Oct 2017 11:28:06 -0400 Received: from baptiste.telenet-ops.be ([195.130.132.51]:56552 "EHLO baptiste.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754019AbdJPP2D (ORCPT ); Mon, 16 Oct 2017 11:28:03 -0400 Received: from ayla.of.borg ([84.195.106.246]) by baptiste.telenet-ops.be with bizsmtp id NFU11w00l5JzmfG01FU1Z0; Mon, 16 Oct 2017 17:28:01 +0200 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.86_2) (envelope-from ) id 1e47JB-0001JB-E8; Mon, 16 Oct 2017 17:28:01 +0200 Received: from geert by ramsan with local (Exim 4.86_2) (envelope-from ) id 1e47JB-0005Xd-D4; Mon, 16 Oct 2017 17:28:01 +0200 From: Geert Uytterhoeven To: Laurent Pinchart , Linus Walleij Cc: =?utf-8?q?Niklas_S=C3=B6derlund?= , linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v2 04/14] pinctrl: sh-pfc: Add sh_pfc_pin_to_bias_reg() helper Date: Mon, 16 Oct 2017 17:27:49 +0200 Message-Id: <1508167679-21155-5-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1508167679-21155-1-git-send-email-geert+renesas@glider.be> References: <1508167679-21155-1-git-send-email-geert+renesas@glider.be> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add a helper to look up bias registers and bit number for a specific pin, using the generic bias register description. Signed-off-by: Geert Uytterhoeven --- v2: - Use ARRAY_SIZE() instead of hardcoded constant 32, - Add curly braces to nested for statements. --- drivers/pinctrl/sh-pfc/core.c | 20 ++++++++++++++++++++ drivers/pinctrl/sh-pfc/core.h | 3 +++ 2 files changed, 23 insertions(+) diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c index 8b422ac07e57263b..01c408a3dee478f2 100644 --- a/drivers/pinctrl/sh-pfc/core.c +++ b/drivers/pinctrl/sh-pfc/core.c @@ -404,6 +404,26 @@ sh_pfc_pin_to_bias_info(const struct sh_pfc_bias_info *info, return NULL; } +const struct pinmux_bias_reg * +sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin, + unsigned int *bit) +{ + unsigned int i, j; + + for (i = 0; pfc->info->bias_regs[i].puen; i++) { + for (j = 0; j < ARRAY_SIZE(pfc->info->bias_regs[i].pins); j++) { + if (pfc->info->bias_regs[i].pins[j] == pin) { + *bit = j; + return &pfc->info->bias_regs[i]; + } + } + } + + WARN_ONCE(1, "Pin %u is not in bias info list\n", pin); + + return NULL; +} + static int sh_pfc_init_ranges(struct sh_pfc *pfc) { struct sh_pfc_pin_range *range; diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h index dd215d36dcc82f8a..460d996513acea26 100644 --- a/drivers/pinctrl/sh-pfc/core.h +++ b/drivers/pinctrl/sh-pfc/core.h @@ -35,5 +35,8 @@ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type); const struct sh_pfc_bias_info * sh_pfc_pin_to_bias_info(const struct sh_pfc_bias_info *info, unsigned int num, unsigned int pin); +const struct pinmux_bias_reg * +sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin, + unsigned int *bit); #endif /* __SH_PFC_CORE_H__ */