From patchwork Wed Oct 4 09:07:11 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 821196 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3y6VR261wRz9sRW for ; Wed, 4 Oct 2017 20:07:26 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751998AbdJDJHY (ORCPT ); Wed, 4 Oct 2017 05:07:24 -0400 Received: from laurent.telenet-ops.be ([195.130.137.89]:42070 "EHLO laurent.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751980AbdJDJHV (ORCPT ); Wed, 4 Oct 2017 05:07:21 -0400 Received: from ayla.of.borg ([84.195.106.246]) by laurent.telenet-ops.be with bizsmtp id HM7K1w0085JzmfG01M7K8P; Wed, 04 Oct 2017 11:07:19 +0200 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.86_2) (envelope-from ) id 1dzfeB-0007mf-6B; Wed, 04 Oct 2017 11:07:19 +0200 Received: from geert by ramsan with local (Exim 4.86_2) (envelope-from ) id 1dzfeB-0002Gq-5A; Wed, 04 Oct 2017 11:07:19 +0200 From: Geert Uytterhoeven To: Laurent Pinchart , Linus Walleij Cc: =?utf-8?q?Niklas_S=C3=B6derlund?= , linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH 12/14] pinctrl: sh-pfc: r8a7795: Use generic IOCTRL register description Date: Wed, 4 Oct 2017 11:07:11 +0200 Message-Id: <1507108033-8606-13-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1507108033-8606-1-git-send-email-geert+renesas@glider.be> References: <1507108033-8606-1-git-send-email-geert+renesas@glider.be> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Move R-Car H3 ES2.0 I/O voltage support over to the generic way to describe IOCTRL registers, which will be needed for suspend/resume support. Signed-off-by: Geert Uytterhoeven --- drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c index 5e204337079618e6..5edbe8cac76cfaea 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c @@ -4603,11 +4603,20 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { { }, }; +enum ioctrl_regs { + POCCTRL, +}; + +static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = { + [POCCTRL] = { 0xe6060380, }, + { }, +}; + static int r8a7795_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl) { int bit = -EINVAL; - *pocctrl = 0xe6060380; + *pocctrl = pinmux_ioctrl_regs[POCCTRL].reg; if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 11)) bit = pin & 0x1f; @@ -4938,6 +4947,7 @@ const struct sh_pfc_soc_info r8a7795_pinmux_info = { .cfg_regs = pinmux_config_regs, .drive_regs = pinmux_drive_regs, .bias_regs = pinmux_bias_regs, + .ioctrl_regs = pinmux_ioctrl_regs, .pinmux_data = pinmux_data, .pinmux_data_size = ARRAY_SIZE(pinmux_data),