From patchwork Fri Apr 7 15:10:11 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 748368 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3w032h4vC4z9s81 for ; Sat, 8 Apr 2017 01:11:56 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933979AbdDGPLD (ORCPT ); Fri, 7 Apr 2017 11:11:03 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:46078 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934294AbdDGPK5 (ORCPT ); Fri, 7 Apr 2017 11:10:57 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id v37F6uSw009310; Fri, 7 Apr 2017 17:10:26 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-.pphosted.com with ESMTP id 29j1nwft39-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 07 Apr 2017 17:10:26 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id D4EF431; Fri, 7 Apr 2017 15:10:25 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id B1D1A2A19; Fri, 7 Apr 2017 15:10:25 +0000 (GMT) Received: from localhost (10.75.127.44) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1178.4; Fri, 7 Apr 2017 17:10:25 +0200 From: Alexandre TORGUE To: Linus Walleij , Maxime Coquelin , Patrice Chotard , Paul Gortmaker , Rob Herring CC: , , , Subject: [PATCH 4/4] ARM: dts: stm32: Set gpio controller also as interrupt controller Date: Fri, 7 Apr 2017 17:10:11 +0200 Message-ID: <1491577811-26989-5-git-send-email-alexandre.torgue@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1491577811-26989-1-git-send-email-alexandre.torgue@st.com> References: <1491577811-26989-1-git-send-email-alexandre.torgue@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG1NODE1.st.com (10.75.127.1) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-04-07_12:, , signatures=0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This patch set each gpio controller as a interrupt controller. User who wants to use gpio as interrupt will have choice to use either "gpiolib" interface or "common" interrupt interface. Signed-off-by: Alexandre TORGUE Acked-by: Linus Walleij diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index ee0da97..12c6b70 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -555,6 +555,8 @@ gpioa: gpio@40020000 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x0 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOA)>; st,bank-name = "GPIOA"; @@ -563,6 +565,8 @@ gpiob: gpio@40020400 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x400 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOB)>; st,bank-name = "GPIOB"; @@ -571,6 +575,8 @@ gpioc: gpio@40020800 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x800 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOC)>; st,bank-name = "GPIOC"; @@ -579,6 +585,8 @@ gpiod: gpio@40020c00 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0xc00 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOD)>; st,bank-name = "GPIOD"; @@ -587,6 +595,8 @@ gpioe: gpio@40021000 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x1000 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOE)>; st,bank-name = "GPIOE"; @@ -595,6 +605,8 @@ gpiof: gpio@40021400 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x1400 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOF)>; st,bank-name = "GPIOF"; @@ -603,6 +615,8 @@ gpiog: gpio@40021800 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x1800 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOG)>; st,bank-name = "GPIOG"; @@ -611,6 +625,8 @@ gpioh: gpio@40021c00 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x1c00 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOH)>; st,bank-name = "GPIOH"; @@ -619,6 +635,8 @@ gpioi: gpio@40022000 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x2000 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOI)>; st,bank-name = "GPIOI"; @@ -627,6 +645,8 @@ gpioj: gpio@40022400 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x2400 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOJ)>; st,bank-name = "GPIOJ"; @@ -635,6 +655,8 @@ gpiok: gpio@40022800 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x2800 0x400>; clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOK)>; st,bank-name = "GPIOK"; diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi index f321ffe..8f2525f 100644 --- a/arch/arm/boot/dts/stm32f746.dtsi +++ b/arch/arm/boot/dts/stm32f746.dtsi @@ -190,6 +190,8 @@ gpioa: gpio@40020000 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x0 0x400>; clocks = <&rcc 0 256>; st,bank-name = "GPIOA"; @@ -198,6 +200,8 @@ gpiob: gpio@40020400 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x400 0x400>; clocks = <&rcc 0 257>; st,bank-name = "GPIOB"; @@ -206,6 +210,8 @@ gpioc: gpio@40020800 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x800 0x400>; clocks = <&rcc 0 258>; st,bank-name = "GPIOC"; @@ -214,6 +220,8 @@ gpiod: gpio@40020c00 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0xc00 0x400>; clocks = <&rcc 0 259>; st,bank-name = "GPIOD"; @@ -222,6 +230,8 @@ gpioe: gpio@40021000 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x1000 0x400>; clocks = <&rcc 0 260>; st,bank-name = "GPIOE"; @@ -230,6 +240,8 @@ gpiof: gpio@40021400 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x1400 0x400>; clocks = <&rcc 0 261>; st,bank-name = "GPIOF"; @@ -238,6 +250,8 @@ gpiog: gpio@40021800 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x1800 0x400>; clocks = <&rcc 0 262>; st,bank-name = "GPIOG"; @@ -246,6 +260,8 @@ gpioh: gpio@40021c00 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x1c00 0x400>; clocks = <&rcc 0 263>; st,bank-name = "GPIOH"; @@ -254,6 +270,8 @@ gpioi: gpio@40022000 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x2000 0x400>; clocks = <&rcc 0 264>; st,bank-name = "GPIOI"; @@ -262,6 +280,8 @@ gpioj: gpio@40022400 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x2400 0x400>; clocks = <&rcc 0 265>; st,bank-name = "GPIOJ"; @@ -270,6 +290,8 @@ gpiok: gpio@40022800 { gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x2800 0x400>; clocks = <&rcc 0 266>; st,bank-name = "GPIOK";