From patchwork Wed Mar 29 16:04:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris Brezillon X-Patchwork-Id: 744850 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3vtXdQ0tlWz9s2Q for ; Thu, 30 Mar 2017 03:04:26 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752373AbdC2QEZ (ORCPT ); Wed, 29 Mar 2017 12:04:25 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:42504 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752283AbdC2QEY (ORCPT ); Wed, 29 Mar 2017 12:04:24 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id D1BD220814; Wed, 29 Mar 2017 18:04:21 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id A0B102076D; Wed, 29 Mar 2017 18:04:21 +0200 (CEST) From: Boris Brezillon To: Linus Walleij , Alexandre Courbot , linux-gpio@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Simon Hatliff , Thomas Petazzoni , Boris Brezillon Subject: [PATCH 2/2] dt-bindings: gpio: Document Cadence GPIO controller bindings Date: Wed, 29 Mar 2017 18:04:19 +0200 Message-Id: <1490803459-29697-2-git-send-email-boris.brezillon@free-electrons.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490803459-29697-1-git-send-email-boris.brezillon@free-electrons.com> References: <1490803459-29697-1-git-send-email-boris.brezillon@free-electrons.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Document Cadence GPIO bindings. Signed-off-by: Boris Brezillon --- .../devicetree/bindings/gpio/cdns,gpio.txt | 41 ++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/cdns,gpio.txt diff --git a/Documentation/devicetree/bindings/gpio/cdns,gpio.txt b/Documentation/devicetree/bindings/gpio/cdns,gpio.txt new file mode 100644 index 000000000000..09fb2c8e5c9d --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/cdns,gpio.txt @@ -0,0 +1,41 @@ +Cadence GPIO controller bindings + +Required properties: +- compatible: should be "cdns,gpio-r1p02". +- reg: the register base address and size. +- #gpio-cells: should be 2. + * first cell is the GPIO number. + * second cell specifies the GPIO flags, as defined in + . Only the GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW + flags are supported. +- gpio-controller: marks the device as a GPIO controller. +- clocks: should contain one entry referencing the peripheral clock driving the + GPIO controller. + +Optional properties: +- interrupt-parent: phandle of the parent interrupt controller. +- interrupts: interrupt specifier for the controllers interrupt. +- interrupt-controller: marks the device as an interrupt controller. When + defined, interrupts, interrupt-parent and #interrupt-cells are required. +- interrupt-cells: should be 2. + * first cell is the GPIO number you want to use as an IRQ source. + * second cell specifies the IRQ type, as defined in + . + +Example: + + gpio-controller@d050000 { + compatible = "cdns,gpio"; + reg = <0xd050000 0x10000>; + + clocks = <&gpio_pclk>; + + interrupt-parent = <&intc>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + };