From patchwork Tue Mar 7 13:31:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 736171 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3vcz3k50xqz9sNg for ; Wed, 8 Mar 2017 01:06:42 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="UNnvxJWQ"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755518AbdCGOGU (ORCPT ); Tue, 7 Mar 2017 09:06:20 -0500 Received: from mail-wm0-f54.google.com ([74.125.82.54]:37481 "EHLO mail-wm0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755432AbdCGOGC (ORCPT ); Tue, 7 Mar 2017 09:06:02 -0500 Received: by mail-wm0-f54.google.com with SMTP id n11so5702543wma.0 for ; Tue, 07 Mar 2017 06:04:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6CuhPOc7jI5k04x+Jx9aIwyeDxbFYg7KNjYhLFLS1S8=; b=UNnvxJWQIsfOk8H8wEO/KtUtNiyrv2JaWDbDAIFV5s+dE7XQWcP12qqiC0KnwP0rJv z9KgwS6rS6Bf+cUte8IoM4Zv1/PFTJdCef6I59+pMwsDjlvUWuGgKZhag2xfBXuNGy9V ++KsmwIcUYfeAwl4tgXe2VXjzC2cEpilhZvpsexBxaR/nhx6B+IznlYk1XJ+lfdLgr8y wSuf5+7j0El7NrHFC+VYW2fo7+gM7TgXcbIkoLPDDeWcAgd57Pcnj/m+K4epZOhrZX3g HdjzWTZCWVt4igwvjC/JnJgLjoc0o7opfQm7OS3stBUxBnMoxLl1omFhaIjx4iC3ZH1A X/LA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6CuhPOc7jI5k04x+Jx9aIwyeDxbFYg7KNjYhLFLS1S8=; b=msDSKF7Ra5SW4P61oIXsdeL3CXKFnyLDeUBrKkui5V8HktVPRjCKMt8MIh/FKuWQK7 mYi0LMXVOeL3keaIvdam7n84Yfx/PAGSI75TinCMDO0TH8bIpct+doSC+kFzf0/hMU3K 8QEV4m3m34IIWzhcmw5aFWSXdlsW35F5z12PYZqkLDHcpB1X9cOVylFBKF37Yv7/IHxb eU3U4GdWFFxiUExV7FNndlKOQ3CDbP48/G8ozz1ikQEs1P5SlHJ6bvReAnmNwZ7FRNVR tWOzDYwwF4rVM4Td/OBlScELQ8DsB+Qa/mQPgTnAXEQgm2S6mQIJelsLPqr/4BXkDX6m I2XA== X-Gm-Message-State: AMke39m72onsdwsclTBK3fRYtuXOviyD4lKRusdIe4Xzh191T/YTve+1dY8PJ+ql5rS3/rfY X-Received: by 10.28.13.20 with SMTP id 20mr18080156wmn.24.1488893475366; Tue, 07 Mar 2017 05:31:15 -0800 (PST) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id y4sm15723109wmy.5.2017.03.07.05.31.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 07 Mar 2017 05:31:14 -0800 (PST) From: Neil Armstrong To: khilman@baylibre.com, carlo@caione.org, linus.walleij@linaro.org Cc: Neil Armstrong , linux-gpio@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 3/3] ARM64: dts: meson-gxl: Add missing pinctrl pins groups Date: Tue, 7 Mar 2017 14:31:02 +0100 Message-Id: <1488893462-7016-4-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1488893462-7016-1-git-send-email-narmstrong@baylibre.com> References: <1488893462-7016-1-git-send-email-narmstrong@baylibre.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add pinctrl pins nodes following the additions of missing pins in the pinctrl driver. Signed-off-by: Neil Armstrong Acked-by: Linus Walleij --- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 32 ++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index 583c7b8..17cd546 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -103,6 +103,13 @@ }; }; + uart_ao_b_0_1_pins: uart_ao_b_0_1 { + mux { + groups = "uart_tx_ao_b_0", "uart_rx_ao_b_1"; + function = "uart_ao_b"; + }; + }; + uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts { mux { groups = "uart_cts_ao_b", @@ -118,6 +125,14 @@ }; }; + i2c_ao_pins: i2c_ao { + mux { + groups = "i2c_sck_ao", + "i2c_sda_ao"; + function = "i2c_ao"; + }; + }; + pwm_ao_a_3_pins: pwm_ao_a_3 { mux { groups = "pwm_ao_a_3"; @@ -138,6 +153,13 @@ function = "pwm_ao_b"; }; }; + + pwm_ao_b_6_pins: pwm_ao_b_6 { + mux { + groups = "pwm_ao_b_6"; + function = "pwm_ao_b_6"; + }; + }; }; }; @@ -168,6 +190,16 @@ }; }; + nor_pins: nor { + mux { + groups = "nor_d", + "nor_q", + "nor_c", + "nor_cs"; + function = "nor"; + }; + }; + sdcard_pins: sdcard { mux { groups = "sdcard_d0",