diff mbox

[v2,2/2] pinctrl: sx150x: support setting multiple pins at once

Message ID 1479896331-16915-3-git-send-email-peda@axentia.se
State New
Headers show

Commit Message

Peter Rosin Nov. 23, 2016, 10:18 a.m. UTC 
If the chip does not have an oscio pin, all pins are configured in
the same regmap register making it trivial to update all pins at
once, so do that. If an oscio pin is present, there needs to be
more locking in place to handle all cases correctly, so this is
skipped.

Signed-off-by: Peter Rosin <peda@axentia.se>
---
 drivers/pinctrl/pinctrl-sx150x.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

Comments

Linus Walleij Nov. 24, 2016, 2:08 p.m. UTC | #1 
On Wed, Nov 23, 2016 at 11:18 AM, Peter Rosin <peda@axentia.se> wrote:

> If the chip does not have an oscio pin, all pins are configured in
> the same regmap register making it trivial to update all pins at
> once, so do that. If an oscio pin is present, there needs to be
> more locking in place to handle all cases correctly, so this is
> skipped.
>
> Signed-off-by: Peter Rosin <peda@axentia.se>

Tired of waiting for ACKs. Looks good. Patch applied.

Yours,
Linus Walleij
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diff mbox

Patch

diff --git a/drivers/pinctrl/pinctrl-sx150x.c b/drivers/pinctrl/pinctrl-sx150x.c
index ef4ef88e0ee9..f9e559e22537 100644
--- a/drivers/pinctrl/pinctrl-sx150x.c
+++ b/drivers/pinctrl/pinctrl-sx150x.c
@@ -395,6 +395,15 @@  static void sx150x_gpio_set(struct gpio_chip *chip, unsigned int offset,
 
 }
 
+static void sx150x_gpio_set_multiple(struct gpio_chip *chip,
+				     unsigned long *mask,
+				     unsigned long *bits)
+{
+	struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
+
+	regmap_write_bits(pctl->regmap, pctl->data->reg_data, *mask, *bits);
+}
+
 static int sx150x_gpio_direction_input(struct gpio_chip *chip,
 				       unsigned int offset)
 {
@@ -1075,6 +1084,14 @@  static int sx150x_probe(struct i2c_client *client,
 	pctl->gpio.of_node = dev->of_node;
 #endif
 	pctl->gpio.can_sleep = true;
+	/*
+	 * Setting multiple pins is not safe when all pins are not
+	 * handled by the same regmap register. The oscio pin (present
+	 * on the SX150X_789 chips) lives in its own register, so
+	 * would require locking that is not in place at this time.
+	 */
+	if (pctl->data->model != SX150X_789)
+		pctl->gpio.set_multiple = sx150x_gpio_set_multiple;
 
 	ret = devm_gpiochip_add_data(dev, &pctl->gpio, pctl);
 	if (ret)