From patchwork Wed Sep 7 13:37:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 667017 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3sTl0K1LlFz9s65 for ; Wed, 7 Sep 2016 23:38:09 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b=Dc8MsRZf; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757168AbcIGNiB (ORCPT ); Wed, 7 Sep 2016 09:38:01 -0400 Received: from mail-wm0-f51.google.com ([74.125.82.51]:35440 "EHLO mail-wm0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757446AbcIGNh7 (ORCPT ); Wed, 7 Sep 2016 09:37:59 -0400 Received: by mail-wm0-f51.google.com with SMTP id i204so86768882wma.0 for ; Wed, 07 Sep 2016 06:37:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=aYPhvQGtmZVu1St3LQxNxF24Xpqvv1vuQPK8cRnTVFI=; b=Dc8MsRZfs972URPFM5HMVLMXsGLNBDAelLOhbi2OkhdolRyVQWQ/tuXjPAoKW175PH enEYJVrsvKKhW3CfgCQAXD6WEfoM06nFLriXfnp9OsoeJkNW0Pg7C6TYjWI9mrcgjiU1 PX0a8JHs9jcgcJTwjKbtDPj0MPDYK03Koatg69UAHe+KWFVpeWHGRjK3J+SiJ1chPQ5g 4p+YmbjNWDUzabf2r24U5kUWUMlMssjOVfP0mSJQNVW9RRsFoKMZzukSKOGrqdVeFTvn 4m9/o4ZCJGx47Qm3K4m3KnohPy/Jvi0S6cCDsyiNq8sOG4QzqQTKz8JxxOib5esedFAs dpVg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=aYPhvQGtmZVu1St3LQxNxF24Xpqvv1vuQPK8cRnTVFI=; b=K4yWAUaf29jKj/bSfXNv2WchSS83NOCCJGuVK6PBxKrEOTK5uYQ4bGv9s2ejapAFiq /AZC1FwJ6MZFcS+Yy1ufC7Ggooxfa5yg1TJsM+S6kz6M0WwtoBUYo3tI+t7zp34Mj4o3 k9EnFEiL1RnjkRxLHbfzufJJmShlzG3h5AoYsz3rLxreki1kCYbtIbjTpInecSxNdeUl GfMxZxJHZ5nl8JIHBRNkTYCxXxtCA073TFS/CqpFLAxJreKzGGyngemgkCjM42LX6Nuy bADrdPFu+cosEvkythN9DJiOjTk7K1fUvVDa+vVoyvlMhV793V4jpdEm1vQXpdO9fYEa F7cw== X-Gm-Message-State: AE9vXwOPy1prckgYzuQhUBLUzMD4wZlXoljLanr7hEKYEqHV8Z6Q1ut7GjA7ipphbQA55a1/ X-Received: by 10.194.85.18 with SMTP id d18mr40517264wjz.43.1473255478056; Wed, 07 Sep 2016 06:37:58 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id 190sm4363889wmk.13.2016.09.07.06.37.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 07 Sep 2016 06:37:57 -0700 (PDT) From: Bartosz Golaszewski To: Linus Walleij , Alexandre Courbot , Andy Shevchenko , Vignesh R , Yong Li , Geert Uytterhoeven Cc: linux-gpio , LKML , Bartosz Golaszewski Subject: [PATCH v3 1/5] gpio: pca953x: code shrink Date: Wed, 7 Sep 2016 15:37:48 +0200 Message-Id: <1473255472-16090-2-git-send-email-bgolaszewski@baylibre.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1473255472-16090-1-git-send-email-bgolaszewski@baylibre.com> References: <1473255472-16090-1-git-send-email-bgolaszewski@baylibre.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org There are multiple places in the driver code where a switch (chip->chip_type) is used to determine the proper register offset. Unduplicate the code by adding a simple structure holding the possible offsets that differ between the pca953x and pca957x chip families and use it to avoid the checks. Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-pca953x.c | 122 +++++++++++++++----------------------------- 1 file changed, 42 insertions(+), 80 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 02f2a56..d47e6f9 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -94,6 +94,24 @@ MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids); #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ) +struct pca953x_offset { + int direction; + int output; + int input; +}; + +static const struct pca953x_offset pca953x_offsets = { + .direction = PCA953X_DIRECTION, + .output = PCA953X_OUTPUT, + .input = PCA953X_INPUT, +}; + +static const struct pca953x_offset pca957x_offsets = { + .direction = PCA957X_CFG, + .output = PCA957X_OUT, + .input = PCA957X_IN, +}; + struct pca953x_chip { unsigned gpio_start; u8 reg_output[MAX_BANK]; @@ -113,6 +131,8 @@ struct pca953x_chip { const char *const *names; int chip_type; unsigned long driver_data; + + const struct pca953x_offset *offset; }; static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, @@ -222,20 +242,12 @@ static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) { struct pca953x_chip *chip = gpiochip_get_data(gc); u8 reg_val; - int ret, offset = 0; + int ret; mutex_lock(&chip->i2c_lock); reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ)); - switch (chip->chip_type) { - case PCA953X_TYPE: - offset = PCA953X_DIRECTION; - break; - case PCA957X_TYPE: - offset = PCA957X_CFG; - break; - } - ret = pca953x_write_single(chip, offset, reg_val, off); + ret = pca953x_write_single(chip, chip->offset->direction, reg_val, off); if (ret) goto exit; @@ -250,7 +262,7 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, { struct pca953x_chip *chip = gpiochip_get_data(gc); u8 reg_val; - int ret, offset = 0; + int ret; mutex_lock(&chip->i2c_lock); /* set output level */ @@ -261,15 +273,7 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, reg_val = chip->reg_output[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); - switch (chip->chip_type) { - case PCA953X_TYPE: - offset = PCA953X_OUTPUT; - break; - case PCA957X_TYPE: - offset = PCA957X_OUT; - break; - } - ret = pca953x_write_single(chip, offset, reg_val, off); + ret = pca953x_write_single(chip, chip->offset->output, reg_val, off); if (ret) goto exit; @@ -277,15 +281,7 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, /* then direction */ reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); - switch (chip->chip_type) { - case PCA953X_TYPE: - offset = PCA953X_DIRECTION; - break; - case PCA957X_TYPE: - offset = PCA957X_CFG; - break; - } - ret = pca953x_write_single(chip, offset, reg_val, off); + ret = pca953x_write_single(chip, chip->offset->direction, reg_val, off); if (ret) goto exit; @@ -299,18 +295,10 @@ static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) { struct pca953x_chip *chip = gpiochip_get_data(gc); u32 reg_val; - int ret, offset = 0; + int ret; mutex_lock(&chip->i2c_lock); - switch (chip->chip_type) { - case PCA953X_TYPE: - offset = PCA953X_INPUT; - break; - case PCA957X_TYPE: - offset = PCA957X_IN; - break; - } - ret = pca953x_read_single(chip, offset, ®_val, off); + ret = pca953x_read_single(chip, chip->offset->input, ®_val, off); mutex_unlock(&chip->i2c_lock); if (ret < 0) { /* NOTE: diagnostic already emitted; that's all we should @@ -327,7 +315,7 @@ static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) { struct pca953x_chip *chip = gpiochip_get_data(gc); u8 reg_val; - int ret, offset = 0; + int ret; mutex_lock(&chip->i2c_lock); if (val) @@ -337,15 +325,7 @@ static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) reg_val = chip->reg_output[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); - switch (chip->chip_type) { - case PCA953X_TYPE: - offset = PCA953X_OUTPUT; - break; - case PCA957X_TYPE: - offset = PCA957X_OUT; - break; - } - ret = pca953x_write_single(chip, offset, reg_val, off); + ret = pca953x_write_single(chip, chip->offset->output, reg_val, off); if (ret) goto exit; @@ -359,19 +339,10 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, { struct pca953x_chip *chip = gpiochip_get_data(gc); u8 reg_val[MAX_BANK]; - int ret, offset = 0; + int ret; int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); int bank; - switch (chip->chip_type) { - case PCA953X_TYPE: - offset = PCA953X_OUTPUT; - break; - case PCA957X_TYPE: - offset = PCA957X_OUT; - break; - } - memcpy(reg_val, chip->reg_output, NBANK(chip)); mutex_lock(&chip->i2c_lock); for(bank=0; bankclient, offset << bank_shift, NBANK(chip), reg_val); + ret = i2c_smbus_write_i2c_block_data(chip->client, + chip->offset->output << bank_shift, + NBANK(chip), reg_val); if (ret) goto exit; @@ -515,7 +488,7 @@ static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) bool pending_seen = false; bool trigger_seen = false; u8 trigger[MAX_BANK]; - int ret, i, offset = 0; + int ret, i; if (chip->driver_data & PCA_PCAL) { /* Read the current interrupt status from the device */ @@ -540,15 +513,7 @@ static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) return pending_seen; } - switch (chip->chip_type) { - case PCA953X_TYPE: - offset = PCA953X_INPUT; - break; - case PCA957X_TYPE: - offset = PCA957X_IN; - break; - } - ret = pca953x_read_regs(chip, offset, cur_stat); + ret = pca953x_read_regs(chip, chip->offset->input, cur_stat); if (ret) return false; @@ -608,20 +573,13 @@ static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base) { struct i2c_client *client = chip->client; - int ret, i, offset = 0; + int ret, i; if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT)) { - switch (chip->chip_type) { - case PCA953X_TYPE: - offset = PCA953X_INPUT; - break; - case PCA957X_TYPE: - offset = PCA957X_IN; - break; - } - ret = pca953x_read_regs(chip, offset, chip->irq_stat); + ret = pca953x_read_regs(chip, + chip->offset->input, chip->irq_stat); if (ret) return ret; @@ -684,6 +642,8 @@ static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) int ret; u8 val[MAX_BANK]; + chip->offset = &pca953x_offsets; + ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output); if (ret) goto out; @@ -709,6 +669,8 @@ static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) int ret; u8 val[MAX_BANK]; + chip->offset = &pca957x_offsets; + ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output); if (ret) goto out;