From patchwork Fri Sep 2 15:33:14 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 665239 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3sQjrx4mXqz9s5w for ; Sat, 3 Sep 2016 01:36:17 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932481AbcIBPek (ORCPT ); Fri, 2 Sep 2016 11:34:40 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:30642 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932434AbcIBPea (ORCPT ); Fri, 2 Sep 2016 11:34:30 -0400 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by m0046037.ppops.net (8.16.0.11/8.16.0.11) with SMTP id u82FOEa4014017; Fri, 2 Sep 2016 17:34:00 +0200 Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-.pphosted.com with ESMTP id 255btars0p-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 02 Sep 2016 17:34:00 +0200 Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 0B05322; Fri, 2 Sep 2016 15:33:57 +0000 (GMT) Received: from Webmail-ap.st.com (eapex1hubcas1.st.com [10.80.176.8]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 97BE82ED; Fri, 2 Sep 2016 15:33:55 +0000 (GMT) Received: from localhost (10.48.0.2) by Webmail-ap.st.com (10.80.176.7) with Microsoft SMTP Server (TLS) id 8.3.444.0; Fri, 2 Sep 2016 23:33:54 +0800 From: Alexandre TORGUE To: Maxime Coquelin , Thomas Gleixner , Jason Cooper , Marc Zyngier , Linus Walleij , Mark Rutland , Rob Herring , , CC: , , , Daniel Thompson , , Subject: [PATCH v3 5/9] Documentation: dt-bindings: Add IRQ related properties of STM32 pinctrl Date: Fri, 2 Sep 2016 17:33:14 +0200 Message-ID: <1472830398-13275-6-git-send-email-alexandre.torgue@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1472830398-13275-1-git-send-email-alexandre.torgue@st.com> References: <1472830398-13275-1-git-send-email-alexandre.torgue@st.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2016-09-02_04:, , signatures=0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Signed-off-by: Maxime Coquelin Acked-by: Rob Herring Signed-off-by: Alexandre TORGUE diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt index 587bffb..a0eed99 100644 --- a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt @@ -14,6 +14,9 @@ Required properies: - #size-cells : The value of this property must be 1 - ranges : defines mapping between pin controller node (parent) to gpio-bank node (children). + - interrupt-parent: phandle of the interrupt parent to which the external + GPIO interrupts are forwarded to. + - st,syscfg: phandle of the syscfg node used for IRQ mux selection. - pins-are-numbered: Specify the subnodes are using numbered pinmux to specify pins.