From patchwork Mon Aug 22 11:42:52 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 661413 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3sHsC65xvbz9sxN for ; Mon, 22 Aug 2016 21:43:14 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752859AbcHVLnO (ORCPT ); Mon, 22 Aug 2016 07:43:14 -0400 Received: from mga04.intel.com ([192.55.52.120]:55366 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752148AbcHVLnN (ORCPT ); Mon, 22 Aug 2016 07:43:13 -0400 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga104.fm.intel.com with ESMTP; 22 Aug 2016 04:43:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,559,1464678000"; d="scan'208";a="1018443525" Received: from black.fi.intel.com ([10.237.72.56]) by orsmga001.jf.intel.com with ESMTP; 22 Aug 2016 04:42:54 -0700 Received: by black.fi.intel.com (Postfix, from userid 1001) id 87C281C8; Mon, 22 Aug 2016 14:42:52 +0300 (EEST) From: Mika Westerberg To: Linus Walleij Cc: Heikki Krogerus , Yu C Chen , Anisse Astier , Mika Westerberg , linux-gpio@vger.kernel.org Subject: [PATCH v2] pinctrl: cherryview: Do not mask all interrupts in probe Date: Mon, 22 Aug 2016 14:42:52 +0300 Message-Id: <1471866172-64154-1-git-send-email-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.8.1 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The Cherryview GPIO controller has 8 or 16 wires connected to the I/O-APIC which can be used directly by the platform/BIOS or drivers. One such wire is used as SCI (System Control Interrupt) which ACPI depends on to be able to trigger GPEs (General Purpose Events). The pinctrl driver itself uses another IRQ resource which is wire OR of all the 8 (or 16) wires and follows what BIOS has programmed to the IntSel register of each pin. Currently the driver masks all interrupts at probe time and this prevents these direct interrupts from working as expected. The reason for this is that some early stage prototypes had some pins misconfigured causing lots of spurious interrupts. We fix this by leaving the interrupt mask untouched. This allows SCI and other direct interrupts work properly. What comes to the possible spurious interrupts we switch the default handler to be handle_bad_irq() instead of handle_simple_irq() (which was not correct anyway). Reported-by: Yu C Chen Reported-by: Anisse Astier Signed-off-by: Mika Westerberg Tested-by: Anisse Astier --- Changes from the previous version [1]: - Update changelog - Use handle_bad_irq() instead of handle_simple_irq() [1] https://lkml.org/lkml/2015/5/22/111 Anisse, This is slightly different what I asked you test last time. I wonder if you could give this a try and see if you still get ACPI GPEs. drivers/pinctrl/intel/pinctrl-cherryview.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c index 5749a4eee746..0fe8fad25e4d 100644 --- a/drivers/pinctrl/intel/pinctrl-cherryview.c +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c @@ -1539,12 +1539,11 @@ static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq) offset += range->npins; } - /* Mask and clear all interrupts */ - chv_writel(0, pctrl->regs + CHV_INTMASK); + /* Clear all interrupts */ chv_writel(0xffff, pctrl->regs + CHV_INTSTAT); ret = gpiochip_irqchip_add(chip, &chv_gpio_irqchip, 0, - handle_simple_irq, IRQ_TYPE_NONE); + handle_bad_irq, IRQ_TYPE_NONE); if (ret) { dev_err(pctrl->dev, "failed to add IRQ chip\n"); goto fail;