| Message ID | 1466165027-17917-4-git-send-email-jonathanh@nvidia.com |
|---|---|
| State | New |
| Headers | show |
On Fri, Jun 17, 2016 at 01:03:37PM +0100, Jon Hunter wrote: > Update the DPAUX compatibility string information for Tegra124, Tegra132 > and Tegra210. For Tegra210 an additional clock, 'sor-safe' is also > required for DPAUX and so add this clock information as well. > > Signed-off-by: Jon Hunter <jonathanh@nvidia.com> > --- > .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt > index a3bd8c050c4e..361a472eac4b 100644 > --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt > +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt > @@ -226,9 +226,9 @@ of the following host1x client modules: > - nvidia,dpaux: phandle to a DispayPort AUX interface > > - dpaux: DisplayPort AUX interface > - - compatible: For Tegra124, must contain "nvidia,tegra124-dpaux". Otherwise, > - must contain '"nvidia,<chip>-dpaux", "nvidia,tegra124-dpaux"', where > - <chip> is tegra132. > + - compatible : Should contain one of the following: > + - "nvidia,tegra124-dpaux": for Tegra124 and Tegra132 > + - "nvidia,tegra210-dpaux": for Tegra210 > - reg: Physical base address and length of the controller's registers. > - interrupts: The interrupt outputs from the controller. > - clocks: Must contain an entry for each entry in clock-names. > @@ -236,6 +236,7 @@ of the following host1x client modules: > - clock-names: Must include the following entries: > - dpaux: clock input for the DPAUX hardware > - parent: reference clock > + - sor-safe: additional clock input for the DPAUX hardware on Tegra210 It might be worth calling this simply "safe" because that's the contextual role of the clock, whereas sor-safe is the system name of the clock. Thierry
On 17/06/16 17:13, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Fri, Jun 17, 2016 at 01:03:37PM +0100, Jon Hunter wrote: >> Update the DPAUX compatibility string information for Tegra124, Tegra132 >> and Tegra210. For Tegra210 an additional clock, 'sor-safe' is also >> required for DPAUX and so add this clock information as well. >> >> Signed-off-by: Jon Hunter <jonathanh@nvidia.com> >> --- >> .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 7 ++++--- >> 1 file changed, 4 insertions(+), 3 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt >> index a3bd8c050c4e..361a472eac4b 100644 >> --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt >> +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt >> @@ -226,9 +226,9 @@ of the following host1x client modules: >> - nvidia,dpaux: phandle to a DispayPort AUX interface >> >> - dpaux: DisplayPort AUX interface >> - - compatible: For Tegra124, must contain "nvidia,tegra124-dpaux". Otherwise, >> - must contain '"nvidia,<chip>-dpaux", "nvidia,tegra124-dpaux"', where >> - <chip> is tegra132. >> + - compatible : Should contain one of the following: >> + - "nvidia,tegra124-dpaux": for Tegra124 and Tegra132 >> + - "nvidia,tegra210-dpaux": for Tegra210 >> - reg: Physical base address and length of the controller's registers. >> - interrupts: The interrupt outputs from the controller. >> - clocks: Must contain an entry for each entry in clock-names. >> @@ -236,6 +236,7 @@ of the following host1x client modules: >> - clock-names: Must include the following entries: >> - dpaux: clock input for the DPAUX hardware >> - parent: reference clock >> + - sor-safe: additional clock input for the DPAUX hardware on Tegra210 > > It might be worth calling this simply "safe" because that's the > contextual role of the clock, whereas sor-safe is the system name of the > clock. Yes that is fine with me. Jon
diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt index a3bd8c050c4e..361a472eac4b 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt @@ -226,9 +226,9 @@ of the following host1x client modules: - nvidia,dpaux: phandle to a DispayPort AUX interface - dpaux: DisplayPort AUX interface - - compatible: For Tegra124, must contain "nvidia,tegra124-dpaux". Otherwise, - must contain '"nvidia,<chip>-dpaux", "nvidia,tegra124-dpaux"', where - <chip> is tegra132. + - compatible : Should contain one of the following: + - "nvidia,tegra124-dpaux": for Tegra124 and Tegra132 + - "nvidia,tegra210-dpaux": for Tegra210 - reg: Physical base address and length of the controller's registers. - interrupts: The interrupt outputs from the controller. - clocks: Must contain an entry for each entry in clock-names. @@ -236,6 +236,7 @@ of the following host1x client modules: - clock-names: Must include the following entries: - dpaux: clock input for the DPAUX hardware - parent: reference clock + - sor-safe: additional clock input for the DPAUX hardware on Tegra210 - resets: Must contain an entry for each entry in reset-names. See ../reset/reset.txt for details. - reset-names: Must include the following entries:
Update the DPAUX compatibility string information for Tegra124, Tegra132 and Tegra210. For Tegra210 an additional clock, 'sor-safe' is also required for DPAUX and so add this clock information as well. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> --- .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)