From patchwork Mon Jun 6 06:50:09 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfram Sang X-Patchwork-Id: 630655 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3rNQM04X53z9snm for ; Mon, 6 Jun 2016 16:50:36 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751728AbcFFGu2 (ORCPT ); Mon, 6 Jun 2016 02:50:28 -0400 Received: from sauhun.de ([89.238.76.85]:47459 "EHLO pokefinder.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751568AbcFFGuZ (ORCPT ); Mon, 6 Jun 2016 02:50:25 -0400 Received: from dslb-178-008-110-053.178.008.pools.vodafone-ip.de ([178.8.110.53]:59026 helo=localhost) by pokefinder.org with esmtpsa (TLS1.2:RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1b9oMg-0004qB-9B; Mon, 06 Jun 2016 08:50:22 +0200 From: Wolfram Sang To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven , Wolfram Sang Subject: [RFC 1/3] pinctrl: sh-pfc: refactor voltage setting Date: Mon, 6 Jun 2016 08:50:09 +0200 Message-Id: <1465195811-3041-2-git-send-email-wsa@the-dreams.de> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1465195811-3041-1-git-send-email-wsa@the-dreams.de> References: <1465195811-3041-1-git-send-email-wsa@the-dreams.de> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Wolfram Sang All known hardware being able to switch voltages has the same POCCTRL register. So, factor out the common code to the core and keep only the pin-to-bit mapping SoC specific. Convert the only user, r8a7790. In case POCCTRL should ever get more complex (more voltages to select?), we should probably switch over to a describing array like drive strength does currently. Signed-off-by: Wolfram Sang Reviewed-by: Geert Uytterhoeven --- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 58 ++++++++---------------------------- drivers/pinctrl/sh-pfc/pinctrl.c | 41 +++++++++++++++---------- drivers/pinctrl/sh-pfc/sh_pfc.h | 4 +-- 3 files changed, 40 insertions(+), 63 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c index eed8daa464cc1e..1537a077939977 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c @@ -4696,47 +4696,6 @@ static const char * const vin3_groups[] = { "vin3_clk", }; -#define IOCTRL6 0x8c - -static int r8a7790_get_io_voltage(struct sh_pfc *pfc, unsigned int pin) -{ - u32 data, mask; - - if (WARN(pin < RCAR_GP_PIN(3, 0) || pin > RCAR_GP_PIN(3, 31), "invalid pin %#x", pin)) - return -EINVAL; - - data = ioread32(pfc->windows->virt + IOCTRL6), - /* Bits in IOCTRL6 are numbered in opposite order to pins */ - mask = 0x80000000 >> (pin & 0x1f); - - return (data & mask) ? 3300 : 1800; -} - -static int r8a7790_set_io_voltage(struct sh_pfc *pfc, unsigned int pin, u16 mV) -{ - u32 data, mask; - - if (WARN(pin < RCAR_GP_PIN(3, 0) || pin > RCAR_GP_PIN(3, 31), "invalid pin %#x", pin)) - return -EINVAL; - - if (mV != 1800 && mV != 3300) - return -EINVAL; - - data = ioread32(pfc->windows->virt + IOCTRL6); - /* Bits in IOCTRL6 are numbered in opposite order to pins */ - mask = 0x80000000 >> (pin & 0x1f); - - if (mV == 3300) - data |= mask; - else - data &= ~mask; - - iowrite32(~data, pfc->windows->virt); /* unlock reg */ - iowrite32(data, pfc->windows->virt + IOCTRL6); - - return 0; -} - static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(audio_clk), SH_PFC_FUNCTION(avb), @@ -5736,14 +5695,23 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { { }, }; -static const struct sh_pfc_soc_operations pinmux_ops = { - .get_io_voltage = r8a7790_get_io_voltage, - .set_io_voltage = r8a7790_set_io_voltage, +static int r8a7790_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl) +{ + if (pin < RCAR_GP_PIN(3, 0) || pin > RCAR_GP_PIN(3, 31)) + return -EINVAL; + + *pocctrl = 0xe606008c; + + return 31 - (pin & 0x1f); +} + +static const struct sh_pfc_soc_operations r8a7790_pinmux_ops = { + .pin_to_pocctrl = r8a7790_pin_to_pocctrl, }; const struct sh_pfc_soc_info r8a7790_pinmux_info = { .name = "r8a77900_pfc", - .ops = &pinmux_ops, + .ops = &r8a7790_pinmux_ops, .unlock_reg = 0xe6060000, /* PMMR */ .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c index fdb445d68b9a08..d4e65bc7dacd67 100644 --- a/drivers/pinctrl/sh-pfc/pinctrl.c +++ b/drivers/pinctrl/sh-pfc/pinctrl.c @@ -632,19 +632,21 @@ static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin, } case PIN_CONFIG_POWER_SOURCE: { - int ret; + u32 pocctrl, val; + int bit; - if (!pfc->info->ops || !pfc->info->ops->get_io_voltage) + if (!pfc->info->ops || !pfc->info->ops->pin_to_pocctrl) return -ENOTSUPP; + bit = pfc->info->ops->pin_to_pocctrl(pfc, _pin, &pocctrl); + if (WARN(bit < 0, "invalid pin %#x", _pin)) + return bit; + spin_lock_irqsave(&pfc->lock, flags); - ret = pfc->info->ops->get_io_voltage(pfc, _pin); + val = sh_pfc_read_reg(pfc, pocctrl, 32); spin_unlock_irqrestore(&pfc->lock, flags); - if (ret < 0) - return ret; - - *config = ret; + *config = (val & BIT(bit)) ? 3300 : 1800; break; } @@ -696,20 +698,29 @@ static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned _pin, } case PIN_CONFIG_POWER_SOURCE: { - unsigned int arg = - pinconf_to_config_argument(configs[i]); - int ret; + unsigned int mV = pinconf_to_config_argument(configs[i]); + u32 pocctrl, val; + int bit; - if (!pfc->info->ops || !pfc->info->ops->set_io_voltage) + if (!pfc->info->ops || !pfc->info->ops->pin_to_pocctrl) return -ENOTSUPP; + bit = pfc->info->ops->pin_to_pocctrl(pfc, _pin, &pocctrl); + if (WARN(bit < 0, "invalid pin %#x", _pin)) + return bit; + + if (mV != 1800 && mV != 3300) + return -EINVAL; + spin_lock_irqsave(&pfc->lock, flags); - ret = pfc->info->ops->set_io_voltage(pfc, _pin, arg); + val = sh_pfc_read_reg(pfc, pocctrl, 32); + if (mV == 3300) + val |= BIT(bit); + else + val &= ~BIT(bit); + sh_pfc_write_reg(pfc, pocctrl, 32, val); spin_unlock_irqrestore(&pfc->lock, flags); - if (ret) - return ret; - break; } diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h index 656ea32f776c92..ea3a527514558a 100644 --- a/drivers/pinctrl/sh-pfc/sh_pfc.h +++ b/drivers/pinctrl/sh-pfc/sh_pfc.h @@ -189,9 +189,7 @@ struct sh_pfc_soc_operations { unsigned int (*get_bias)(struct sh_pfc *pfc, unsigned int pin); void (*set_bias)(struct sh_pfc *pfc, unsigned int pin, unsigned int bias); - int (*get_io_voltage)(struct sh_pfc *pfc, unsigned int pin); - int (*set_io_voltage)(struct sh_pfc *pfc, unsigned int pin, - u16 voltage_mV); + int (*pin_to_pocctrl)(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl); }; struct sh_pfc_soc_info {