From patchwork Tue May 31 21:17:06 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 628408 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3rK5sp5ldZz9t41 for ; Wed, 1 Jun 2016 07:17:18 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750927AbcEaVRQ (ORCPT ); Tue, 31 May 2016 17:17:16 -0400 Received: from muru.com ([72.249.23.125]:55105 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750813AbcEaVRQ (ORCPT ); Tue, 31 May 2016 17:17:16 -0400 Received: from sampyla.monkeybrains.net (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id 4A7608362; Tue, 31 May 2016 21:19:22 +0000 (UTC) From: Tony Lindgren To: Linus Walleij Cc: Haojian Zhuang , Grygorii Strashko , linux-gpio@vger.kernel.org, linux-omap@vger.kernel.org Subject: [PATCH] pinctrl: single: Fix missing flush of posted write for a wakeirq Date: Tue, 31 May 2016 14:17:06 -0700 Message-Id: <1464729426-11187-1-git-send-email-tony@atomide.com> X-Mailer: git-send-email 2.8.1 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org With many repeated suspend resume cycles, the pin specific wakeirq may not always work on omaps. This is because the write to enable the pin interrupt may not have reached the device over the interconnect before suspend happens. Let's fix the issue with a flush of posted write with a readback. Reported-by: Nishanth Menon Signed-off-by: Tony Lindgren --- drivers/pinctrl/pinctrl-single.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index cf9bafa..bfdf720 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -1580,6 +1580,9 @@ static inline void pcs_irq_set(struct pcs_soc_data *pcs_soc, else mask &= ~soc_mask; pcs->write(mask, pcswi->reg); + + /* flush posted write */ + mask = pcs->read(pcswi->reg); raw_spin_unlock(&pcs->lock); }