From patchwork Mon May 2 12:17:10 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laxman Dewangan X-Patchwork-Id: 617491 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3qz3YS1pmFz9t4P for ; Mon, 2 May 2016 22:30:36 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753261AbcEBMaT (ORCPT ); Mon, 2 May 2016 08:30:19 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:10944 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753064AbcEBMaN (ORCPT ); Mon, 2 May 2016 08:30:13 -0400 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com id ; Mon, 02 May 2016 05:30:16 -0700 Received: from HQMAIL107.nvidia.com ([172.20.187.13]) by hqnvupgp08.nvidia.com (PGP Universal service); Mon, 02 May 2016 05:29:39 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Mon, 02 May 2016 05:29:39 -0700 Received: from DRUKMAIL101.nvidia.com (10.25.59.19) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Mon, 2 May 2016 12:30:10 +0000 Received: from HQMAIL101.nvidia.com (172.20.187.10) by drukmail101.nvidia.com (10.25.59.19) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Mon, 2 May 2016 12:30:06 +0000 Received: from ldewanganubuntu-System-Product-Name.nvidia.com (172.20.13.39) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server id 15.0.1130.7 via Frontend Transport; Mon, 2 May 2016 12:30:01 +0000 From: Laxman Dewangan To: , , , , , , CC: , , , , Laxman Dewangan Subject: [PATCH 2/6] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl() Date: Mon, 2 May 2016 17:47:10 +0530 Message-ID: <1462191434-28933-3-git-send-email-ldewangan@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1462191434-28933-1-git-send-email-ldewangan@nvidia.com> References: <1462191434-28933-1-git-send-email-ldewangan@nvidia.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The function tegra_pmc_readl() returns the u32 type data and hence change the data type of variable where this data is stored to u32 type. Signed-off-by: Laxman Dewangan --- Changes from V1: -This is new in series as per discussion on V1 series to use u32 for tegra_pmc_readl. --- drivers/soc/tegra/pmc.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 2c3f1f9..fc4f7b2 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -878,7 +878,7 @@ static int tegra_io_rail_prepare(unsigned int id, unsigned long *request, static int tegra_io_rail_poll(unsigned long offset, unsigned long mask, unsigned long val, unsigned long timeout) { - unsigned long value; + u32 value; timeout = jiffies + msecs_to_jiffies(timeout); @@ -900,8 +900,9 @@ static void tegra_io_rail_unprepare(void) int tegra_io_rail_power_on(unsigned int id) { - unsigned long request, status, value; + unsigned long request, status; unsigned int bit, mask; + u32 value; int err; mutex_lock(&pmc->powergates_lock); @@ -935,8 +936,9 @@ EXPORT_SYMBOL(tegra_io_rail_power_on); int tegra_io_rail_power_off(unsigned int id) { - unsigned long request, status, value; + unsigned long request, status; unsigned int bit, mask; + u32 value; int err; mutex_lock(&pmc->powergates_lock);