From patchwork Thu Jan 7 10:27:07 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Nguyen X-Patchwork-Id: 564233 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id B899D140271 for ; Thu, 7 Jan 2016 21:27:46 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=apm.com header.i=@apm.com header.b=WHtxLWRy; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752515AbcAGK1n (ORCPT ); Thu, 7 Jan 2016 05:27:43 -0500 Received: from mail-pa0-f46.google.com ([209.85.220.46]:35422 "EHLO mail-pa0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752773AbcAGK1j (ORCPT ); Thu, 7 Jan 2016 05:27:39 -0500 Received: by mail-pa0-f46.google.com with SMTP id qh10so5298296pab.2 for ; Thu, 07 Jan 2016 02:27:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=apm.com; s=apm; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Qa/6OrED5diBiUw+p/q0WxXHQhkGrBI6xbHIPjECF/0=; b=WHtxLWRyNPv4kQYl2RhVMveJevznsYRMHnkVtfmQw0Zp9g62cNtiG6rNZ6Aei0zi1y Ftz/585laiDmHxzhq//SCHb22eIbddSvSi5NhYB/vDXrD1uzz64IaC0ZPmrVnHaxigpA IfqVudOdIddYhdRhdw2aNAaQPFMlNMjxEvufg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Qa/6OrED5diBiUw+p/q0WxXHQhkGrBI6xbHIPjECF/0=; b=Fb+FPfZ6FpGPlvakwlclllr5+I2u4xs1gNX4KaapWzTNGQsmVItFVgaQ3PAhr4rbeC qqRn1n5EXKaU9kijN3aLiSZtiw8d8RdpuCB+New7luVBGQxIRu/HWhYAle+UINB+CBqj yGZ9NcEKsY2HyDkxvLnpBnclWUtnwXJmaZQuaIZuf20r5wxSVYcjBfcsuNFn6CEotrTW dIjdFHrq7XZgZTGfZcOmjlDzLPS0nTdoh1VmHQ8f9/gifs5B8piRXlrAEt83312OYsgW NbFrf1Yoj8v9wa2L92VC/cq0n1iDe8nkOKLsFw7vV05BruPnvNsNpBxOdZGekGLV4jWc J/iA== X-Gm-Message-State: ALoCoQkRkaEr3NI0249cqB8n33KgOfcWewsb5ch07ct7HY7oc8iX0fIl26M+eTA47a5SoA4BR39d7q0AHErUXmW0RnY9LP7TBA== X-Received: by 10.66.140.39 with SMTP id rd7mr149557696pab.86.1452162458598; Thu, 07 Jan 2016 02:27:38 -0800 (PST) Received: from localhost.localdomain ([118.69.219.197]) by smtp.gmail.com with ESMTPSA id fc8sm153268991pab.21.2016.01.07.02.27.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 07 Jan 2016 02:27:37 -0800 (PST) From: Quan Nguyen To: linus.walleij@linaro.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Thomas Gleixner , Jason Cooper , Marc Zyngier Cc: Y Vo , Phong Vo , Loc Ho , Feng Kan , Duc Dang , patches@apm.com, Quan Nguyen Subject: [PATCH v3 2/3] Documentation: gpio: Update description for X-Gene standby GPIO controller DTS binding Date: Thu, 7 Jan 2016 17:27:07 +0700 Message-Id: <1452162428-26839-3-git-send-email-qnguyen@apm.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1452162428-26839-1-git-send-email-qnguyen@apm.com> References: <1452162428-26839-1-git-send-email-qnguyen@apm.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Update description for X-Gene standby GPIO controller DTS binding to support GPIO line configuration as input, output or external IRQ pin. Signed-off-by: Y Vo Signed-off-by: Quan Nguyen Acked-by: Rob Herring --- .../devicetree/bindings/gpio/gpio-xgene-sb.txt | 49 +++++++++++++++++----- 1 file changed, 38 insertions(+), 11 deletions(-) diff --git a/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt b/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt index dae1300..a960d1b 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt +++ b/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt @@ -1,10 +1,20 @@ APM X-Gene Standby GPIO controller bindings -This is a gpio controller in the standby domain. - -There are 20 GPIO pins from 0..21. There is no GPIO_DS14 or GPIO_DS15, -only GPIO_DS8..GPIO_DS13 support interrupts. The IRQ mapping -is currently 1-to-1 on interrupts 0x28 thru 0x2d. +This is a gpio controller in the standby domain. It also supports interrupt in +some particular pins which are sourced to its parent interrupt controller +as diagram below: + +-----------------+ + | X-Gene standby | + | GPIO controller +--------- GPIO_0 ++------------+ | | ... +| Parent IRQ | | +--------- GPIO_8/EXT_INT_0 +| controller | EXT_INT_0 | | ... +| (GICv2) +-------------+ +--------- GPIO_[N+8]/EXT_INT_N +| | ... | | +| | EXT_INT_N | +--------- GPIO_[N+9] +| +-------------+ | ... +| | | +--------- GPIO_MAX ++------------+ +-----------------+ Required properties: - compatible: "apm,xgene-gpio-sb" for the X-Gene Standby GPIO controller @@ -16,6 +26,11 @@ Required properties: 1 = active low - gpio-controller: Marks the device node as a GPIO controller. - interrupts: Shall contain exactly 6 interrupts. +- interrupt-parent: Phandle of the parent interrupt controller. +- interrupt-cells: Shoule be two. + - first cell is 0-N coresponding for EXT_INT_0 to EXT_INT_N. + - second cell is used to specify flags. +- interrupt-controller: Marks the device node as an interrupt controller. Example: sbgpio: sbgpio@17001000 { @@ -23,10 +38,22 @@ Example: reg = <0x0 0x17001000 0x0 0x400>; #gpio-cells = <2>; gpio-controller; - interrupts = <0x0 0x28 0x1>, - <0x0 0x29 0x1>, - <0x0 0x2a 0x1>, - <0x0 0x2b 0x1>, - <0x0 0x2c 0x1>, - <0x0 0x2d 0x1>; + interrupt-parent = <&gic>; + interrupts = <0x0 0x28 0x4>, + <0x0 0x29 0x4>, + <0x0 0x2a 0x4>, + <0x0 0x2b 0x4>, + <0x0 0x2c 0x4>, + <0x0 0x2d 0x4>; + #interrupt-cells = <2>; + interrupt-controller; + }; + + testuser { + compatible = "example,testuser"; + /* Use the GPIO_13/EXT_INT_5 line as an active high triggered + * level interrupt + */ + interrupts = <5 4>; + interrupt-parent = <&sbgpio>; };