From patchwork Wed Nov 18 01:00:26 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 545831 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id AA0DD141428 for ; Wed, 18 Nov 2015 12:00:31 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751639AbbKRBAa (ORCPT ); Tue, 17 Nov 2015 20:00:30 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:45363 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751496AbbKRBA3 (ORCPT ); Tue, 17 Nov 2015 20:00:29 -0500 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 8B2C91402EA; Wed, 18 Nov 2015 01:00:28 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 7A2F5140397; Wed, 18 Nov 2015 01:00:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-caf-smtp.dmz.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=ALL_TRUSTED,BAYES_00 autolearn=ham version=3.3.1 Received: from sboyd-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: sboyd@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id B0C4D1402EA; Wed, 18 Nov 2015 01:00:27 +0000 (UTC) From: Stephen Boyd To: Linus Walleij Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, "Ivan T. Ivanov" , Bjorn Andersson Subject: [RFC/PATCH] pinctrl: qcom: Add generic ssbi and spmi GPIO/MPP bindings Date: Tue, 17 Nov 2015 17:00:26 -0800 Message-Id: <1447808426-21834-1-git-send-email-sboyd@codeaurora.org> X-Mailer: git-send-email 2.6.3.369.g91ad409 X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The drivers don't really need to know which PMIC they're for, so make a generic binding for them. This alleviates us from updating the drivers every time a new PMIC comes out. It's still recommended that we update the binding with new PMIC models and always specify the specific model for the MPPs and gpios before the generic compatible string in devicetree, but this at least cuts down on adding more and more compatible strings to the drivers until we actually need them. Cc: Cc: "Ivan T. Ivanov" Cc: Bjorn Andersson Signed-off-by: Stephen Boyd Reviewed-by: Andy Gross Acked-by: Ivan T. Ivanov Reviewed-by: Bjorn Andersson --- We can also figure out the number of the pins from the number of interrupts, so we really don't need to even look at the size of the reg property or model number for the spmi and ssbi modules. I'll propose that change as well tomorrow. Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt | 5 ++++- Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.txt | 5 ++++- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 1 + drivers/pinctrl/qcom/pinctrl-spmi-mpp.c | 1 + 4 files changed, 10 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt index a90c812ad642..f1e4643f4132 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt @@ -17,6 +17,9 @@ PMIC's from Qualcomm. "qcom,pm8994-gpio" "qcom,pma8084-gpio" + And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio" + if the device is on an spmi bus or an ssbi bus respectively + - reg: Usage: required Value type: @@ -183,7 +186,7 @@ to specify in a pin configuration subnode: Example: pm8921_gpio: gpio@150 { - compatible = "qcom,pm8921-gpio"; + compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio"; reg = <0x150 0x160>; interrupts = <192 1>, <193 1>, <194 1>, <195 1>, <196 1>, <197 1>, diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.txt b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.txt index d74e631e10da..e28320b18ecb 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.txt +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.txt @@ -18,6 +18,9 @@ of PMIC's from Qualcomm. "qcom,pm8994-mpp", "qcom,pma8084-mpp", + And must contain either "qcom,spmi-mpp" or "qcom,ssbi-mpp" + if the device is on an spmi bus or an ssbi bus respectively. + - reg: Usage: required Value type: @@ -157,7 +160,7 @@ to specify in a pin configuration subnode: Example: mpps@a000 { - compatible = "qcom,pm8841-mpp"; + compatible = "qcom,pm8841-mpp", "qcom,spmi-mpp"; reg = <0xa000>; gpio-controller; #gpio-cells = <2>; diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c index df4413023e21..9f9979903fcb 100644 --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c @@ -806,6 +806,7 @@ static const struct of_device_id pmic_gpio_of_match[] = { { .compatible = "qcom,pm8941-gpio" }, /* 36 GPIO's */ { .compatible = "qcom,pm8994-gpio" }, /* 22 GPIO's */ { .compatible = "qcom,pma8084-gpio" }, /* 22 GPIO's */ + { .compatible = "qcom,spmi-gpio" }, /* Generic */ { }, }; diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c b/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c index 7b4136a22c5b..5a4373dd9c61 100644 --- a/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c @@ -909,6 +909,7 @@ static const struct of_device_id pmic_mpp_of_match[] = { { .compatible = "qcom,pm8941-mpp" }, /* 8 MPP's */ { .compatible = "qcom,pm8994-mpp" }, /* 8 MPP's */ { .compatible = "qcom,pma8084-mpp" }, /* 8 MPP's */ + { .compatible = "qcom,spmi-mpp" }, /* Generic */ { }, };