From patchwork Tue Jun 9 23:23:20 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Hutchings X-Patchwork-Id: 482400 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id F1A17140758 for ; Wed, 10 Jun 2015 09:23:27 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753745AbbFIXX0 (ORCPT ); Tue, 9 Jun 2015 19:23:26 -0400 Received: from ducie-dc1.codethink.co.uk ([185.25.241.215]:34314 "EHLO ducie-dc1.codethink.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753351AbbFIXX0 (ORCPT ); Tue, 9 Jun 2015 19:23:26 -0400 Received: from localhost (localhost [127.0.0.1]) by ducie-dc1.codethink.co.uk (Postfix) with ESMTP id A93C2460875; Wed, 10 Jun 2015 00:23:24 +0100 (BST) X-Virus-Scanned: Debian amavisd-new at ducie-dc1.codethink.co.uk Received: from ducie-dc1.codethink.co.uk ([127.0.0.1]) by localhost (ducie-dc1.codethink.co.uk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id RNjftys70t4e; Wed, 10 Jun 2015 00:23:22 +0100 (BST) Received: from xylophone (shadbolt.e.decadent.org.uk [88.96.1.126]) by ducie-dc1.codethink.co.uk (Postfix) with ESMTPSA id C68E846174E; Wed, 10 Jun 2015 00:23:21 +0100 (BST) Message-ID: <1433892200.12074.51.camel@codethink.co.uk> Subject: [PATCH v2 2/6] pinctrl: sh-pfc: Add set_mux operation to struct sh_pfc_function From: Ben Hutchings To: Ian Molton , linux-mmc@vger.kernel.org Cc: linux-sh@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@lists.codethink.co.uk, Sergei Shtylyov , Simon Horman , Kuninori Morimoto Date: Wed, 10 Jun 2015 00:23:20 +0100 In-Reply-To: <1433892104.12074.49.camel@codethink.co.uk> References: <1433892104.12074.49.camel@codethink.co.uk> Organization: Codethink Ltd. X-Mailer: Evolution 3.12.9-1+b1 Mime-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org In some cases a change of function requires changes in more than just the GPSR/IPSR registers. In particular, changing the SDHI between 3.3V and 1.8V signalling also requires modifying IOCTRL6. Add this optional operation so that such special cases can be handled in each SoC's code. Signed-off-by: Ben Hutchings --- drivers/pinctrl/sh-pfc/pinctrl.c | 4 ++++ drivers/pinctrl/sh-pfc/sh_pfc.h | 10 +++++++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c index 072e7c62cab7..068b1cdeddde 100644 --- a/drivers/pinctrl/sh-pfc/pinctrl.c +++ b/drivers/pinctrl/sh-pfc/pinctrl.c @@ -317,6 +317,7 @@ static int sh_pfc_func_set_mux(struct pinctrl_dev *pctldev, unsigned selector, { struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); struct sh_pfc *pfc = pmx->pfc; + const struct sh_pfc_function *func = &pfc->info->functions[selector]; const struct sh_pfc_pin_group *grp = &pfc->info->groups[group]; unsigned long flags; unsigned int i; @@ -340,6 +341,9 @@ static int sh_pfc_func_set_mux(struct pinctrl_dev *pctldev, unsigned selector, break; } + if (func->set_mux) + func->set_mux(pfc, func, grp); + done: spin_unlock_irqrestore(&pfc->lock, flags); return ret; diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h index c7508d5f6886..0ce4f5c7add8 100644 --- a/drivers/pinctrl/sh-pfc/sh_pfc.h +++ b/drivers/pinctrl/sh-pfc/sh_pfc.h @@ -28,6 +28,8 @@ enum { #define SH_PFC_PIN_CFG_PULL_DOWN (1 << 3) #define SH_PFC_PIN_CFG_NO_GPIO (1 << 31) +struct sh_pfc; + struct sh_pfc_pin { u16 pin; u16 enum_id; @@ -50,17 +52,23 @@ struct sh_pfc_pin_group { unsigned int nr_pins; }; -#define SH_PFC_FUNCTION(n) \ +#define SH_PFC_FUNCTION_SPECIAL(n, set_mux_fn) \ { \ .name = #n, \ .groups = n##_groups, \ .nr_groups = ARRAY_SIZE(n##_groups), \ + .set_mux = (set_mux_fn), \ } +#define SH_PFC_FUNCTION(n) SH_PFC_FUNCTION_SPECIAL(n, NULL) + struct sh_pfc_function { const char *name; const char * const *groups; unsigned int nr_groups; + void (*set_mux)(struct sh_pfc *pfc, + const struct sh_pfc_function *func, + const struct sh_pfc_pin_group *grp); }; struct pinmux_func {