From patchwork Mon Apr 20 21:05:26 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 462912 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id B0AC714009B for ; Tue, 21 Apr 2015 07:23:15 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751875AbbDTVXP (ORCPT ); Mon, 20 Apr 2015 17:23:15 -0400 Received: from mail-bn1bon0143.outbound.protection.outlook.com ([157.56.111.143]:55808 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751607AbbDTVXO (ORCPT ); Mon, 20 Apr 2015 17:23:14 -0400 X-Greylist: delayed 880 seconds by postgrey-1.27 at vger.kernel.org; Mon, 20 Apr 2015 17:23:13 EDT Received: from BY2PR03CA004.namprd03.prod.outlook.com (10.255.93.21) by BY1PR03MB1355.namprd03.prod.outlook.com (0.162.109.25) with Microsoft SMTP Server (TLS) id 15.1.136.25; Mon, 20 Apr 2015 21:08:30 +0000 Received: from BN1AFFO11FD048.protection.gbl (10.255.93.4) by BY2PR03CA004.outlook.office365.com (10.255.93.21) with Microsoft SMTP Server (TLS) id 15.1.136.25 via Frontend Transport; Mon, 20 Apr 2015 21:08:30 +0000 Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=freescale.com; freescale.mail.onmicrosoft.com; dkim=none (message not signed) header.d=none; Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Received: from az84smr01.freescale.net (192.88.158.2) by BN1AFFO11FD048.mail.protection.outlook.com (10.58.53.63) with Microsoft SMTP Server (TLS) id 15.1.148.11 via Frontend Transport; Mon, 20 Apr 2015 21:08:29 +0000 Received: from shlinux2.ap.freescale.net (shlinux2.ap.freescale.net [10.192.224.44]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id t3KL8EbD005926; Mon, 20 Apr 2015 14:08:26 -0700 From: To: , , , CC: , , , Frank Li Subject: [PATCH v4 04/11] Document: dt: binding: imx: update document for imx7d support Date: Tue, 21 Apr 2015 05:05:26 +0800 Message-ID: <1429563933-3129-5-git-send-email-Frank.Li@freescale.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1429563933-3129-1-git-send-email-Frank.Li@freescale.com> References: <1429563933-3129-1-git-send-email-Frank.Li@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:NLI; EFV:NLI; BMV:1; SFV:NSPM; SFS:(10019020)(6009001)(339900001)(189002)(199003)(47776003)(2950100001)(92566002)(77096005)(229853001)(105606002)(106466001)(76176999)(50986999)(62966003)(77156002)(50226001)(104016003)(2201001)(86152002)(36756003)(6806004)(87936001)(86362001)(46102003)(19580395003)(19580405001)(85426001)(48376002)(5001770100001)(50466002)(4001430100001); DIR:OUT; SFP:1102; SCL:1; SRVR:BY1PR03MB1355; H:az84smr01.freescale.net; FPR:; SPF:Fail; MLV:sfv; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BY1PR03MB1355; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(5005006)(5002010); SRVR:BY1PR03MB1355; BCL:0; PCL:0; RULEID:; SRVR:BY1PR03MB1355; X-Forefront-PRVS: 05529C6FDB X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Apr 2015 21:08:29.5171 (UTC) X-MS-Exchange-CrossTenant-Id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d; Ip=[192.88.158.2]; Helo=[az84smr01.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY1PR03MB1355 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Frank Li This part just add necessary change to boot imx7d. Update clock, pinctrl and gpt for imx7d Signed-off-by: Frank Li --- .../devicetree/bindings/clock/imx7d-clock.txt | 13 +++++++++++ .../bindings/pinctrl/fsl,imx-pinctrl.txt | 3 +++ .../bindings/pinctrl/fsl,imx7d-pinctrl.txt | 27 ++++++++++++++++++++++ .../devicetree/bindings/timer/fsl,imxgpt.txt | 3 +++ 4 files changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/imx7d-clock.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt diff --git a/Documentation/devicetree/bindings/clock/imx7d-clock.txt b/Documentation/devicetree/bindings/clock/imx7d-clock.txt new file mode 100644 index 0000000..3db0076 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/imx7d-clock.txt @@ -0,0 +1,13 @@ +* Clock bindings for Freescale i.MX7 Dual + +Required properties: +- compatible: Should be "fsl,imx7d-ccm" +- reg: Address and length of the register set +- #clock-cells: Should be <1> +- clocks: list of clock specifiers, must contain an entry for each required + entry in clock-names +- clock-names: should include entries "ckil", "osc", "ipp_di0" and "ipp_di1" + +The clock consumer should specify the desired clock by having the clock +ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx7d-clock.h +for the full list of i.MX7 Dual clock IDs. diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt index 9fde25f..c343a90 100644 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt @@ -21,6 +21,9 @@ Required properties for iomux controller: - compatible: "fsl,-iomuxc" Please refer to each fsl,-pinctrl.txt binding doc for supported SoCs. + "fsl,-iomux-lpsr". Some (imx7d) support one kinds of iomux which +can keep statue when LPSR mode. + Required properties for pin configuration node: - fsl,pins: each entry consists of 6 integers and represents the mux and config setting for one pin. The first 5 integers are specified using a PIN_FUNC_ID macro, which can be found in + imx6sx-pinfunc.h under device tree source folder. The last integer CONFIG is + the pad setting value like pull-up on this pin. Please refer to i.MX7 Dual + Reference Manual for detailed CONFIG settings. + +CONFIG bits definition: +PAD_CTL_PUS_100K_DOWN (0 << 5) +PAD_CTL_PUS_5K_UP (1 << 5) +PAD_CTL_PUS_47K_UP (2 << 5) +PAD_CTL_PUS_100K_UP (3 << 5) +PAD_CTL_PUE (1 << 4) +PAD_CTL_HYS (1 << 3) +PAD_CTL_SRE_SLOW (1 << 2) +PAD_CTL_SRE_FAST (0 << 2) +PAD_CTL_DSE_X1 (0 << 0) +PAD_CTL_DSE_X2 (1 << 0) +PAD_CTL_DSE_X3 (2 << 0) +PAD_CTL_DSE_X4 (3 << 0) diff --git a/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt b/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt index 9809b11..c14843b 100644 --- a/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt +++ b/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt @@ -7,6 +7,9 @@ Required properties: - interrupts : A list of 4 interrupts; one per timer channel. - clocks : The clocks provided by the SoC to drive the timer. +Supported : + imx1,imx27,imx51,imx53,imx6q,imx6dl,imx6sl,imx6sx,imx7d. + Example: gpt1: timer@10003000 {