From patchwork Fri Mar 6 15:05:25 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Antoine Tenart X-Patchwork-Id: 447319 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 0E67C1400B7 for ; Sat, 7 Mar 2015 02:07:58 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755512AbbCFPHi (ORCPT ); Fri, 6 Mar 2015 10:07:38 -0500 Received: from down.free-electrons.com ([37.187.137.238]:38409 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754982AbbCFPFi (ORCPT ); Fri, 6 Mar 2015 10:05:38 -0500 Received: by mail.free-electrons.com (Postfix, from userid 106) id 0733A3B2; Fri, 6 Mar 2015 16:05:43 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (vpn.foo.tf [195.154.43.236]) by mail.free-electrons.com (Postfix) with ESMTPSA id A78AE2BB; Fri, 6 Mar 2015 16:05:42 +0100 (CET) From: Antoine Tenart To: sebastian.hesselbarth@gmail.com, linus.walleij@linaro.org Cc: Antoine Tenart , jszhang@marvell.com, zmxu@marvell.com, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 07/10] Documentation: bindings: move the Berlin pinctrl documentation Date: Fri, 6 Mar 2015 16:05:25 +0100 Message-Id: <1425654328-26298-8-git-send-email-antoine.tenart@free-electrons.com> X-Mailer: git-send-email 2.3.1 In-Reply-To: <1425654328-26298-1-git-send-email-antoine.tenart@free-electrons.com> References: <1425654328-26298-1-git-send-email-antoine.tenart@free-electrons.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The Berlin pinctrl documentation was part of the Marvell Berlin SoC documentation because the Berlin pinctrl configuration was inside the chip and the system controllers. With the recent rework of the chip and system controller handling (now an MFD driver registers all sub-devices of the two soc and system controller nodes and each device has its own sub-node), the documentation of the Berlin pinctrl driver can be moved to the generic pinctrl documentation directory. Signed-off-by: Antoine Tenart Acked-by: Linus Walleij --- .../devicetree/bindings/arm/marvell,berlin.txt | 37 ------------------- .../devicetree/bindings/pinctrl/berlin,pinctrl.txt | 43 ++++++++++++++++++++++ 2 files changed, 43 insertions(+), 37 deletions(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/berlin,pinctrl.txt diff --git a/Documentation/devicetree/bindings/arm/marvell,berlin.txt b/Documentation/devicetree/bindings/arm/marvell,berlin.txt index 8bf3f2075233..ece73c6ad973 100644 --- a/Documentation/devicetree/bindings/arm/marvell,berlin.txt +++ b/Documentation/devicetree/bindings/arm/marvell,berlin.txt @@ -95,23 +95,6 @@ Clocks provided by core clocks shall be referenced by a clock specifier indexing one of the provided clocks. Refer to dt-bindings/clock/berlin.h for the corresponding index mapping. -* Pin controller binding - -Pin control registers are part of both register sets, chip control and system -control. The pins controlled are organized in groups, so no actual pin -information is needed. - -A pin-controller node should contain subnodes representing the pin group -configurations, one per function. Each subnode has the group name and the muxing -function used. - -Be aware the Marvell Berlin datasheets use the keyword 'mode' for what is called -a 'function' in the pin-controller subsystem. - -Required subnode-properties: -- groups: a list of strings describing the group names. -- function: a string describing the function used to mux the groups. - Example: chip: chip-control@ea0000 { @@ -120,29 +103,9 @@ chip: chip-control@ea0000 { reg = <0xea0000 0x400>; clocks = <&refclk>, <&externaldev 0>; clock-names = "refclk", "video_ext0"; - - spi1_pmux: spi1-pmux { - groups = "G0"; - function = "spi1"; - }; }; sysctrl: system-controller@d000 { compatible = "marvell,berlin2-system-ctrl", "simple-mfd", "syscon"; reg = <0xd000 0x100>; - - uart0_pmux: uart0-pmux { - groups = "GSM4"; - function = "uart0"; - }; - - uart1_pmux: uart1-pmux { - groups = "GSM5"; - function = "uart1"; - }; - - uart2_pmux: uart2-pmux { - groups = "GSM3"; - function = "uart2"; - }; }; diff --git a/Documentation/devicetree/bindings/pinctrl/berlin,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/berlin,pinctrl.txt new file mode 100644 index 000000000000..a8bb5e26019c --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/berlin,pinctrl.txt @@ -0,0 +1,43 @@ +* Pin-controller driver for the Marvell Berlin SoCs + +Pin control registers are part of both chip controller and system +controller register sets. Pin controller nodes should be a sub-node of +either the chip controller or system controller node. The pins +controlled are organized in groups, so no actual pin information is +needed. + +A pin-controller node should contain subnodes representing the pin group +configurations, one per function. Each subnode has the group name and +the muxing function used. + +Be aware the Marvell Berlin datasheets use the keyword 'mode' for what +is called a 'function' in the pin-controller subsystem. + +Required properties: +- compatible: should be one of: + "marvell,berlin2-soc-pinctrl", + "marvell,berlin2-system-pinctrl", + "marvell,berlin2cd-soc-pinctrl", + "marvell,berlin2cd-system-pinctrl", + "marvell,berlin2q-soc-pinctrl", + "marvell,berlin2q-system-pinctrl" + +Required subnode-properties: +- groups: a list of strings describing the group names. +- function: a string describing the function used to mux the groups. + +Example: + +sys_pinctrl: pin-controller { + compatible = "marvell,berlin2q-system-pinctrl"; + + uart0_pmux: uart0-pmux { + groups = "GSM12"; + function = "uart0"; + }; +}; + +&uart0 { + pinctrl-0 = <&uart0_pmux>; + pinctrl-names = "default"; +};