From patchwork Thu Jan 29 10:44:48 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 434503 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id D50F81402A2 for ; Thu, 29 Jan 2015 21:45:23 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757440AbbA2Koz (ORCPT ); Thu, 29 Jan 2015 05:44:55 -0500 Received: from mga03.intel.com ([134.134.136.65]:14632 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757461AbbA2Kow (ORCPT ); Thu, 29 Jan 2015 05:44:52 -0500 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP; 29 Jan 2015 02:40:28 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,485,1418112000"; d="scan'208";a="644412350" Received: from black.fi.intel.com ([10.237.72.86]) by orsmga001.jf.intel.com with ESMTP; 29 Jan 2015 02:44:49 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id A635C10E; Thu, 29 Jan 2015 12:44:48 +0200 (EET) From: Mika Westerberg To: Linus Walleij Cc: Jerome Blin , Heikki Krogerus , Mika Westerberg , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] pinctrl: cherryview: Configure HiZ pins to be input when requested as GPIOs Date: Thu, 29 Jan 2015 12:44:48 +0200 Message-Id: <1422528288-84076-1-git-send-email-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.1.4 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org If the pin is in HiZ mode when it is requested as GPIO its value cannot be read (it always returns 0). In order to cope with the Linux GPIO subsystem where we do not have such state at all, turn the pin to be input instead. Reported-by: Jerome Blin Signed-off-by: Mika Westerberg --- drivers/pinctrl/intel/pinctrl-cherryview.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c index dde67d425e9c..abe18960933d 100644 --- a/drivers/pinctrl/intel/pinctrl-cherryview.c +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c @@ -880,9 +880,22 @@ static int chv_gpio_request_enable(struct pinctrl_dev *pctldev, value &= ~CHV_PADCTRL1_INVRXTX_MASK; chv_writel(value, reg); - /* Switch to a GPIO mode */ reg = chv_padreg(pctrl, offset, CHV_PADCTRL0); - value = readl(reg) | CHV_PADCTRL0_GPIOEN; + value = readl(reg); + + /* + * If the pin is in HiZ mode (both TX and RX buffers are + * disabled) we turn it to be input now. + */ + if ((value & CHV_PADCTRL0_GPIOCFG_MASK) == + (CHV_PADCTRL0_GPIOCFG_HIZ << CHV_PADCTRL0_GPIOCFG_SHIFT)) { + value &= ~CHV_PADCTRL0_GPIOCFG_MASK; + value |= CHV_PADCTRL0_GPIOCFG_GPI << + CHV_PADCTRL0_GPIOCFG_SHIFT; + } + + /* Switch to a GPIO mode */ + value |= CHV_PADCTRL0_GPIOEN; chv_writel(value, reg); }