From patchwork Fri Apr 14 23:25:53 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuppuswamy Sathyanarayanan X-Patchwork-Id: 750988 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3w4YnJ6ZKqz9s84 for ; Sat, 15 Apr 2017 09:31:00 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755810AbdDNX3i (ORCPT ); Fri, 14 Apr 2017 19:29:38 -0400 Received: from mga09.intel.com ([134.134.136.24]:25760 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755540AbdDNX3h (ORCPT ); Fri, 14 Apr 2017 19:29:37 -0400 Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Apr 2017 16:29:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,201,1488873600"; d="scan'208";a="77392067" Received: from skuppusw-desk.jf.intel.com ([10.7.198.92]) by orsmga004.jf.intel.com with ESMTP; 14 Apr 2017 16:29:36 -0700 From: sathyanarayanan.kuppuswamy@linux.intel.com To: gnurou@gmail.com, linus.walleij@linaro.org, edubezval@gmail.com, dvhart@infradead.org, rui.zhang@intel.com, lee.jones@linaro.org, andy@infradead.org Cc: linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, sathyaosid@gmail.com, Kuppuswamy Sathyanarayanan Subject: [PATCH v2 1/8] mfd: intel_soc_pmic_bxtwc: fix TMU interrupt index Date: Fri, 14 Apr 2017 16:25:53 -0700 Message-Id: <0e4d82ca9cdc41c9d2a8b45258cd72659b4c2063.1492210847.git.sathyanarayanan.kuppuswamy@linux.intel.com> X-Mailer: git-send-email 2.7.4 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Kuppuswamy Sathyanarayanan TMU interrupts are registered as a separate interrupt chip, and hence it should start its interrupt index(BXTWC_TMU_IRQ) number from 0. But currently, BXTWC_TMU_IRQ is defined as part of enum bxtwc_irqs_level2 and its index value is 11. Since this index value is used when calculating .num_irqs of regmap_irq_chip_tmu, it incorrectly reports number of irqs as 12 instead of actual value of 1. This patch fixes this issue by creating new enum of tmu irqs and resetting its starting index to 0. Signed-off-by: Kuppuswamy Sathyanarayanan Acked-for-MFD-by: Lee Jones --- drivers/mfd/intel_soc_pmic_bxtwc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) Changes since v1: * Removed code from commit message. diff --git a/drivers/mfd/intel_soc_pmic_bxtwc.c b/drivers/mfd/intel_soc_pmic_bxtwc.c index 699c8c7..bb18e20 100644 --- a/drivers/mfd/intel_soc_pmic_bxtwc.c +++ b/drivers/mfd/intel_soc_pmic_bxtwc.c @@ -94,7 +94,10 @@ enum bxtwc_irqs_level2 { BXTWC_GPIO0_IRQ, BXTWC_GPIO1_IRQ, BXTWC_CRIT_IRQ, - BXTWC_TMU_IRQ, +}; + +enum bxtwc_irqs_tmu { + BXTWC_TMU_IRQ = 0, }; static const struct regmap_irq bxtwc_regmap_irqs[] = {