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[0/4] Improvements for MCP23Sxx chips

Message ID cover.1516997103.git.jan.kundrat@cesnet.cz
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Series Improvements for MCP23Sxx chips | expand

Message

Jan Kundrát Jan. 26, 2018, 8:11 p.m. UTC 
a) Open-Drain output of the IRQ lane (see inside for possible caveats).
b) Improvements for multi-instances on the same SPI CS.

This chip is "special" because it supports several "instances" sharing
the same SPI CS lane. Each chip has three HW pins for specifying an
internal address. The first byte of each SPI transaction then
distinguishes which chip we're talking to. So far, so good -- that's
something that the driver already supports.

The actual implementation simply instantiates several regmap and pinctrl
instances sharing the same parent (the spi/spiX.Y dev). That leads to
clashes as soon as more HW chips are present because of naming clashes
within debugfs.

Fixing this for regmap is pretty straightforward. The patch which
implements something similar for the pinctrl subsystem is a bit more
involved because it touches the pinctrl core. The resulting names are
ugly and the `strcmp` in there is largely a hack in order to not force
even more ugliness to the existing chips.

Jan Kundrát (4):
  pinctrl: mcp23s08: IRQ behavior for open-drain interrupts
  pinctrl: mcp23s08: spi: Fix regmap debugfs entries
  pinctrl: mcp23s08: spi: Add HW address to gpio_chip.label
  pinctrl: mcp23s08: spi: Fix duplicate pinctrl debugfs entries

 .../bindings/pinctrl/pinctrl-mcp23s08.txt          |   4 +
 drivers/pinctrl/core.c                             |  18 ++-
 drivers/pinctrl/pinctrl-mcp23s08.c                 | 131 +++++++++++++++------
 3 files changed, 114 insertions(+), 39 deletions(-)