diff mbox series

[v6] ARM: dts: aspeed: Adding Facebook Bletchley BMC

Message ID 20211201033738.121846-1-howard.chiu@quantatw.com
State Superseded, archived
Headers show
Series [v6] ARM: dts: aspeed: Adding Facebook Bletchley BMC | expand

Commit Message

Howard Chiu Dec. 1, 2021, 3:37 a.m. UTC
Initial introduction of Facebook Bletchley equipped with
Aspeed 2600 BMC SoC.

Signed-off-by: Howard Chiu <howard.chiu@quantatw.com>

Change since v5:
- Add an EEPROM on i2c-7
- Change address of FUSB302 to 0x22
- Assign interrupt pin to FUSB302
- Rework pin assignment of pca9539

Change since v4:
- Change address of TMP421 on i2c-12 to 0x4d

Change since v3:
- Add a TMP421 on i2c-10

Change since v2:
- Remove uart5 workaround
- Remove gpio nodes of pca9552/pca9539
- Modify gpio-line-name of led/power/presence pins with openbmc pattern
- Add MP5023 devices

Change since v1:
- Keep sorted in Makefile
- Change baudrate to 57600 from 115200
- Rename node *-ember to *-amber
- Use openbmc-flash-layout-128.dtsi
---
 arch/arm/boot/dts/Makefile                    |   1 +
 .../dts/aspeed-bmc-facebook-bletchley.dts     | 760 ++++++++++++++++++
 2 files changed, 761 insertions(+)
 create mode 100644 arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts

Comments

Joel Stanley Dec. 2, 2021, 6:06 a.m. UTC | #1
Hello Howard,

Please just cc the people that get_maintainers.pl spits out. You don't
want to cc soc@kenrel.org (that's for when patches are ready to apply,
and something that the maintainer for the platform will handle).

$ ./scripts/get_maintainer.pl -f
arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts
Rob Herring <robh+dt@kernel.org> (maintainer:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS)
Joel Stanley <joel@jms.id.au> (supporter:ARM/ASPEED MACHINE SUPPORT)
Andrew Jeffery <andrew@aj.id.au> (reviewer:ARM/ASPEED MACHINE SUPPORT)
devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED
DEVICE TREE BINDINGS)
linux-arm-kernel@lists.infradead.org (moderated list:ARM/ASPEED MACHINE SUPPORT)
linux-aspeed@lists.ozlabs.org (moderated list:ARM/ASPEED MACHINE SUPPORT)
linux-kernel@vger.kernel.org (open list)


On Wed, 1 Dec 2021 at 03:39, Howard Chiu <howard10703049@gmail.com> wrote:
>
> Initial introduction of Facebook Bletchley equipped with
> Aspeed 2600 BMC SoC.

I like to have some background on the machine, as it provides context
for the review. Is it a x86 server? A x86 switch? Of course if this
information is confidential then that's fine to omit it, only provide
what you can.

>
> Signed-off-by: Howard Chiu <howard.chiu@quantatw.com>
>


Put the changes below under ---. This is so they are not included in
the commit message when added to the kernel.

If the information is relevant, then put it in the commit message
above your s-o-b.

> Change since v5:
> - Add an EEPROM on i2c-7
> - Change address of FUSB302 to 0x22
> - Assign interrupt pin to FUSB302
> - Rework pin assignment of pca9539
>
> Change since v4:
> - Change address of TMP421 on i2c-12 to 0x4d
>
> Change since v3:
> - Add a TMP421 on i2c-10
>
> Change since v2:
> - Remove uart5 workaround
> - Remove gpio nodes of pca9552/pca9539
> - Modify gpio-line-name of led/power/presence pins with openbmc pattern
> - Add MP5023 devices
>
> Change since v1:
> - Keep sorted in Makefile
> - Change baudrate to 57600 from 115200
> - Rename node *-ember to *-amber
> - Use openbmc-flash-layout-128.dtsi
> ---
>  arch/arm/boot/dts/Makefile                    |   1 +
>  .../dts/aspeed-bmc-facebook-bletchley.dts     | 760 ++++++++++++++++++
>  2 files changed, 761 insertions(+)
>  create mode 100644 arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 0de64f237cd8..b804b577010a 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1482,6 +1482,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
>         aspeed-bmc-arm-stardragon4800-rep2.dtb \
>         aspeed-bmc-asrock-e3c246d4i.dtb \
>         aspeed-bmc-bytedance-g220a.dtb \
> +       aspeed-bmc-facebook-bletchley.dtb \
>         aspeed-bmc-facebook-cloudripper.dtb \
>         aspeed-bmc-facebook-cmm.dtb \
>         aspeed-bmc-facebook-elbert.dtb \
> diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts
> new file mode 100644
> index 000000000000..c013ebe1704a
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts
> @@ -0,0 +1,760 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +// Copyright (c) 2021 Facebook Inc.
> +/dts-v1/;
> +
> +#include "aspeed-g6.dtsi"
> +#include <dt-bindings/gpio/aspeed-gpio.h>
> +#include <dt-bindings/usb/pd.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +
> +/ {
> +       model = "Facebook Bletchley BMC";
> +       compatible = "facebook,bletchley-bmc", "aspeed,ast2600";
> +
> +       aliases {
> +               serial4 = &uart5;
> +       };
> +
> +       chosen {
> +               bootargs = "console=ttyS4,57600n8";
> +       };
> +
> +       memory@80000000 {
> +               device_type = "memory";
> +               reg = <0x80000000 0x80000000>;
> +       };
> +
> +       iio-hwmon {
> +               compatible = "iio-hwmon";
> +               io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
> +                       <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
> +                       <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>,
> +                       <&adc1 4>, <&adc1 5>, <&adc1 6>, <&adc1 7>;
> +       };
> +
> +       spi_gpio: spi-gpio {
> +               status = "okay";

The okay is redundant.

> +               compatible = "spi-gpio";
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               gpio-sck = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
> +               gpio-mosi = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
> +               gpio-miso = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>;
> +               num-chipselects = <1>;
> +               cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
> +
> +               tpmdev@0 {
> +                       compatible = "tcg,tpm_tis-spi";
> +                       spi-max-frequency = <33000000>;
> +                       reg = <0>;
> +               };
> +       };
> +
> +       switchphy: ethernet-phy@0 {
> +               // Fixed-link

Are there any properties we should be adding here? Other examples
mention the speed and duplex setting.

> +       };
> +

> +
> +&i2c0 {

> +
> +       sled0_fusb302: typec-portc@54 {
> +               compatible = "fcs,fusb302";
> +               reg = <0x22>;

Your reg property is 22, but the unit address is 54. These need to
math or you will get a warning from the device tree compiler:

arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts:254.32-271.4:
Warning (i2c_bus_reg):
/ahb/apb/bus@1e78a000/i2c-bus@80/typec-portc@54: I2C bus unit address
format error, expected "22"

Please fix this for all the fusb302 nodes, and make sure you build
test with this patch applied to v5.16-rc1, or newer.

../arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts:254.32-271.4:
Warning (i2c_bus_reg):
/ahb/apb/bus@1e78a000/i2c-bus@80/typec-portc@54: I2C bus unit address
format error, expected "22"
../arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts:318.32-335.4:
Warning (i2c_bus_reg):
/ahb/apb/bus@1e78a000/i2c-bus@100/typec-portc@54: I2C bus unit address
format error, expected "22"
../arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts:386.32-404.4:
Warning (i2c_bus_reg):
/ahb/apb/bus@1e78a000/i2c-bus@180/typec-portc@54: I2C bus unit address
format error, expected "22"
../arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts:451.32-469.4:
Warning (i2c_bus_reg):
/ahb/apb/bus@1e78a000/i2c-bus@200/typec-portc@54: I2C bus unit address
format error, expected "22"
../arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts:516.32-533.4:
Warning (i2c_bus_reg):
/ahb/apb/bus@1e78a000/i2c-bus@280/typec-portc@54: I2C bus unit address
format error, expected "22"
../arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts:580.32-597.4:
Warning (i2c_bus_reg):
/ahb/apb/bus@1e78a000/i2c-bus@300/typec-portc@54: I2C bus unit address
format error, expected "22"


> +               interrupt-parent = <&gpio0>;
> +               interrupts = <ASPEED_GPIO(M, 0) IRQ_TYPE_LEVEL_LOW>;
> +
> +               connector {
> +                       compatible = "usb-c-connector";
> +                       label = "USB-C";
> +                       power-role = "dual";
> +                       try-power-role = "sink";
> +                       source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
> +                       sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
> +                                       PDO_VAR(3000, 12000, 3000)
> +                                       PDO_PPS_APDO(3000, 11000, 3000)>;
> +                       op-sink-microwatt = <10000000>;
> +               };
> +       };
> +};
> +

Cheers,

Joel
Patrick Williams Dec. 6, 2021, 9:25 p.m. UTC | #2
On Wed, Dec 01, 2021 at 11:37:38AM +0800, Howard Chiu wrote:
> Initial introduction of Facebook Bletchley equipped with
> Aspeed 2600 BMC SoC.
> 
> Signed-off-by: Howard Chiu <howard.chiu@quantatw.com>
> 

...

> Change since v2:
> - Remove uart5 workaround
> - Remove gpio nodes of pca9552/pca9539
> - Modify gpio-line-name of led/power/presence pins with openbmc pattern

A number of the GPIOs do not have defined openbmc patterns for them yet.  The
names you have chosen are ok for now, but we will be changing them as we refine
development of this machine further.

> +		gpio-line-names =
> +		"SLED0_MS_DETECT1","SLED0_VBUS_BMC_EN","SLED0_INA230_ALERT","SLED0_P12V_STBY_ALERT",
> +		"SLED0_SSD_ALERT","SLED0_MS_DETECT0","SLED0_RST_CCG5","SLED0_FUSB302_INT",
> +		"SLED0_MD_STBY_RESET","SLED0_MD_IOEXP_EN_FAULT","SLED0_MD_DIR","SLED0_MD_DECAY",
> +		"SLED0_MD_MODE1","SLED0_MD_MODE2","SLED0_MD_MODE3","power-host0";

Such as these...

> -- 
> 2.25.1
> 

Otherwise,

Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Joel Stanley Dec. 6, 2021, 10:51 p.m. UTC | #3
On Mon, 6 Dec 2021 at 21:25, Patrick Williams <patrick@stwcx.xyz> wrote:
>
> On Wed, Dec 01, 2021 at 11:37:38AM +0800, Howard Chiu wrote:
> > Initial introduction of Facebook Bletchley equipped with
> > Aspeed 2600 BMC SoC.
> >
> > Signed-off-by: Howard Chiu <howard.chiu@quantatw.com>
> >
>
> ...
>
> > Change since v2:
> > - Remove uart5 workaround
> > - Remove gpio nodes of pca9552/pca9539
> > - Modify gpio-line-name of led/power/presence pins with openbmc pattern
>
> A number of the GPIOs do not have defined openbmc patterns for them yet.  The
> names you have chosen are ok for now, but we will be changing them as we refine
> development of this machine further.
>
> > +             gpio-line-names =
> > +             "SLED0_MS_DETECT1","SLED0_VBUS_BMC_EN","SLED0_INA230_ALERT","SLED0_P12V_STBY_ALERT",
> > +             "SLED0_SSD_ALERT","SLED0_MS_DETECT0","SLED0_RST_CCG5","SLED0_FUSB302_INT",
> > +             "SLED0_MD_STBY_RESET","SLED0_MD_IOEXP_EN_FAULT","SLED0_MD_DIR","SLED0_MD_DECAY",
> > +             "SLED0_MD_MODE1","SLED0_MD_MODE2","SLED0_MD_MODE3","power-host0";
>
> Such as these...
>
> > --
> > 2.25.1
> >
>
> Otherwise,
>
> Reviewed-by: Patrick Williams <patrick@stwcx.xyz>

Thanks for reviewing.

Howard, I'm merging patches for v5.17 but I can't apply this until you
fix the warnings I mentioned.

Cheers,

Jeol
>
> --
> Patrick Williams
Howard Chiu (邱冠睿) Dec. 7, 2021, 2:53 a.m. UTC | #4
Hi Joel

Bletchley platform needs to support fan control.
Since Billy's patch for upstream is still under review, I can't add pwm/tach node into dts or the build would fail.

As you know, I had committed the pwm/tach driver for ast26xx to OpenBMC linux, could I commit the dts to OpenBMC linux instead of upstream for early build? 

Howard

> -----Original Message-----
> From: Joel Stanley <joel@jms.id.au>
> Sent: Tuesday, December 7, 2021 6:52 AM
> To: Patrick Williams <patrick@stwcx.xyz>
> Cc: Howard Chiu <howard10703049@gmail.com>; Arnd Bergmann
> <arnd@arndb.de>; Olof Johansson <olof@lixom.net>; SoC Team
> <soc@kernel.org>; Rob Herring <robh+dt@kernel.org>; Andrew Jeffery
> <andrew@aj.id.au>; Linux ARM <linux-arm-kernel@lists.infradead.org>;
> devicetree <devicetree@vger.kernel.org>; Linux Kernel Mailing List
> <linux-kernel@vger.kernel.org>; linux-aspeed <linux-aspeed@lists.ozlabs.org>;
> Howard Chiu (邱冠睿) <Howard.Chiu@quantatw.com>
> Subject: Re: [PATCH v6] ARM: dts: aspeed: Adding Facebook Bletchley BMC
> 
> On Mon, 6 Dec 2021 at 21:25, Patrick Williams <patrick@stwcx.xyz> wrote:
> >
> > On Wed, Dec 01, 2021 at 11:37:38AM +0800, Howard Chiu wrote:
> > > Initial introduction of Facebook Bletchley equipped with
> > > Aspeed 2600 BMC SoC.
> > >
> > > Signed-off-by: Howard Chiu <howard.chiu@quantatw.com>
> > >
> >
> > ...
> >
> > > Change since v2:
> > > - Remove uart5 workaround
> > > - Remove gpio nodes of pca9552/pca9539
> > > - Modify gpio-line-name of led/power/presence pins with openbmc
> pattern
> >
> > A number of the GPIOs do not have defined openbmc patterns for them yet.
> The
> > names you have chosen are ok for now, but we will be changing them as we
> refine
> > development of this machine further.
> >
> > > +             gpio-line-names =
> > > +
> "SLED0_MS_DETECT1","SLED0_VBUS_BMC_EN","SLED0_INA230_ALERT","SLE
> D0_P12V_STBY_ALERT",
> > > +
> "SLED0_SSD_ALERT","SLED0_MS_DETECT0","SLED0_RST_CCG5","SLED0_FUSB
> 302_INT",
> > > +
> "SLED0_MD_STBY_RESET","SLED0_MD_IOEXP_EN_FAULT","SLED0_MD_DIR","
> SLED0_MD_DECAY",
> > > +
> "SLED0_MD_MODE1","SLED0_MD_MODE2","SLED0_MD_MODE3","power-ho
> st0";
> >
> > Such as these...
> >
> > > --
> > > 2.25.1
> > >
> >
> > Otherwise,
> >
> > Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
> 
> Thanks for reviewing.
> 
> Howard, I'm merging patches for v5.17 but I can't apply this until you
> fix the warnings I mentioned.
> 
> Cheers,
> 
> Jeol
> >
> > --
> > Patrick Williams
Joel Stanley Dec. 7, 2021, 3:29 a.m. UTC | #5
On Tue, 7 Dec 2021 at 02:53, Howard Chiu (邱冠睿) <Howard.Chiu@quantatw.com> wrote:
>
> Hi Joel
>
> Bletchley platform needs to support fan control.
> Since Billy's patch for upstream is still under review, I can't add pwm/tach node into dts or the build would fail.
>
> As you know, I had committed the pwm/tach driver for ast26xx to OpenBMC linux, could I commit the dts to OpenBMC linux instead of upstream for early build?

I'd suggest no, omit those features for now, and you can add them in
once we have a driver. The device tree bindings for the tach/pwm need
some work before they can be approved.

When I asked you to fix the patch, I was referring to the usb-c
warnings that I posted about the other week.

>
> Howard
>
> > -----Original Message-----
> > From: Joel Stanley <joel@jms.id.au>
> > Sent: Tuesday, December 7, 2021 6:52 AM
> > To: Patrick Williams <patrick@stwcx.xyz>
> > Cc: Howard Chiu <howard10703049@gmail.com>; Arnd Bergmann
> > <arnd@arndb.de>; Olof Johansson <olof@lixom.net>; SoC Team
> > <soc@kernel.org>; Rob Herring <robh+dt@kernel.org>; Andrew Jeffery
> > <andrew@aj.id.au>; Linux ARM <linux-arm-kernel@lists.infradead.org>;
> > devicetree <devicetree@vger.kernel.org>; Linux Kernel Mailing List
> > <linux-kernel@vger.kernel.org>; linux-aspeed <linux-aspeed@lists.ozlabs.org>;
> > Howard Chiu (邱冠睿) <Howard.Chiu@quantatw.com>
> > Subject: Re: [PATCH v6] ARM: dts: aspeed: Adding Facebook Bletchley BMC
> >
> > On Mon, 6 Dec 2021 at 21:25, Patrick Williams <patrick@stwcx.xyz> wrote:
> > >
> > > On Wed, Dec 01, 2021 at 11:37:38AM +0800, Howard Chiu wrote:
> > > > Initial introduction of Facebook Bletchley equipped with
> > > > Aspeed 2600 BMC SoC.
> > > >
> > > > Signed-off-by: Howard Chiu <howard.chiu@quantatw.com>
> > > >
> > >
> > > ...
> > >
> > > > Change since v2:
> > > > - Remove uart5 workaround
> > > > - Remove gpio nodes of pca9552/pca9539
> > > > - Modify gpio-line-name of led/power/presence pins with openbmc
> > pattern
> > >
> > > A number of the GPIOs do not have defined openbmc patterns for them yet.
> > The
> > > names you have chosen are ok for now, but we will be changing them as we
> > refine
> > > development of this machine further.
> > >
> > > > +             gpio-line-names =
> > > > +
> > "SLED0_MS_DETECT1","SLED0_VBUS_BMC_EN","SLED0_INA230_ALERT","SLE
> > D0_P12V_STBY_ALERT",
> > > > +
> > "SLED0_SSD_ALERT","SLED0_MS_DETECT0","SLED0_RST_CCG5","SLED0_FUSB
> > 302_INT",
> > > > +
> > "SLED0_MD_STBY_RESET","SLED0_MD_IOEXP_EN_FAULT","SLED0_MD_DIR","
> > SLED0_MD_DECAY",
> > > > +
> > "SLED0_MD_MODE1","SLED0_MD_MODE2","SLED0_MD_MODE3","power-ho
> > st0";
> > >
> > > Such as these...
> > >
> > > > --
> > > > 2.25.1
> > > >
> > >
> > > Otherwise,
> > >
> > > Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
> >
> > Thanks for reviewing.
> >
> > Howard, I'm merging patches for v5.17 but I can't apply this until you
> > fix the warnings I mentioned.
> >
> > Cheers,
> >
> > Jeol
> > >
> > > --
> > > Patrick Williams
Howard Chiu (邱冠睿) Dec. 7, 2021, 6:34 a.m. UTC | #6
Hi Joel

> I'd suggest no, omit those features for now, and you can add them in
> once we have a driver. The device tree bindings for the tach/pwm need
> some work before they can be approved.

The driver you mentioned is for OpenBMC Linux or upstream?
If it is for OpenBMC, the upstream robot will reject my DTS because the aspeed-g6.dtsi did not contain pwm/tach node.

If it is for upstream, it will be a long time that OpenBMC Linux won't have tach driver for ast2600 series, and my patch to commit with Billy's early driver for OpenBMC Linux is also meaningless.

> When I asked you to fix the patch, I was referring to the usb-c
> warnings that I posted about the other week.
I will fix it and others you mentioned in the v7 patch.

Howard

> -----Original Message-----
> From: Joel Stanley <joel@jms.id.au>
> Sent: Tuesday, December 7, 2021 11:30 AM
> To: Howard Chiu (邱冠睿) <Howard.Chiu@quantatw.com>
> Cc: Patrick Williams <patrick@stwcx.xyz>; Howard Chiu
> <howard10703049@gmail.com>; Arnd Bergmann <arnd@arndb.de>; Olof
> Johansson <olof@lixom.net>; SoC Team <soc@kernel.org>; Rob Herring
> <robh+dt@kernel.org>; Andrew Jeffery <andrew@aj.id.au>; Linux ARM
> <linux-arm-kernel@lists.infradead.org>; devicetree
> <devicetree@vger.kernel.org>; Linux Kernel Mailing List
> <linux-kernel@vger.kernel.org>; linux-aspeed <linux-aspeed@lists.ozlabs.org>
> Subject: Re: [PATCH v6] ARM: dts: aspeed: Adding Facebook Bletchley BMC
> 
> On Tue, 7 Dec 2021 at 02:53, Howard Chiu (邱冠睿)
> <Howard.Chiu@quantatw.com> wrote:
> >
> > Hi Joel
> >
> > Bletchley platform needs to support fan control.
> > Since Billy's patch for upstream is still under review, I can't add pwm/tach
> node into dts or the build would fail.
> >
> > As you know, I had committed the pwm/tach driver for ast26xx to OpenBMC
> linux, could I commit the dts to OpenBMC linux instead of upstream for early
> build?
> 
> I'd suggest no, omit those features for now, and you can add them in
> once we have a driver. The device tree bindings for the tach/pwm need
> some work before they can be approved.
> 
> When I asked you to fix the patch, I was referring to the usb-c
> warnings that I posted about the other week.
> 
> >
> > Howard
> >
> > > -----Original Message-----
> > > From: Joel Stanley <joel@jms.id.au>
> > > Sent: Tuesday, December 7, 2021 6:52 AM
> > > To: Patrick Williams <patrick@stwcx.xyz>
> > > Cc: Howard Chiu <howard10703049@gmail.com>; Arnd Bergmann
> > > <arnd@arndb.de>; Olof Johansson <olof@lixom.net>; SoC Team
> > > <soc@kernel.org>; Rob Herring <robh+dt@kernel.org>; Andrew Jeffery
> > > <andrew@aj.id.au>; Linux ARM <linux-arm-kernel@lists.infradead.org>;
> > > devicetree <devicetree@vger.kernel.org>; Linux Kernel Mailing List
> > > <linux-kernel@vger.kernel.org>; linux-aspeed
> <linux-aspeed@lists.ozlabs.org>;
> > > Howard Chiu (邱冠睿) <Howard.Chiu@quantatw.com>
> > > Subject: Re: [PATCH v6] ARM: dts: aspeed: Adding Facebook Bletchley BMC
> > >
> > > On Mon, 6 Dec 2021 at 21:25, Patrick Williams <patrick@stwcx.xyz> wrote:
> > > >
> > > > On Wed, Dec 01, 2021 at 11:37:38AM +0800, Howard Chiu wrote:
> > > > > Initial introduction of Facebook Bletchley equipped with
> > > > > Aspeed 2600 BMC SoC.
> > > > >
> > > > > Signed-off-by: Howard Chiu <howard.chiu@quantatw.com>
> > > > >
> > > >
> > > > ...
> > > >
> > > > > Change since v2:
> > > > > - Remove uart5 workaround
> > > > > - Remove gpio nodes of pca9552/pca9539
> > > > > - Modify gpio-line-name of led/power/presence pins with openbmc
> > > pattern
> > > >
> > > > A number of the GPIOs do not have defined openbmc patterns for them
> yet.
> > > The
> > > > names you have chosen are ok for now, but we will be changing them as
> we
> > > refine
> > > > development of this machine further.
> > > >
> > > > > +             gpio-line-names =
> > > > > +
> > >
> "SLED0_MS_DETECT1","SLED0_VBUS_BMC_EN","SLED0_INA230_ALERT","SLE
> > > D0_P12V_STBY_ALERT",
> > > > > +
> > >
> "SLED0_SSD_ALERT","SLED0_MS_DETECT0","SLED0_RST_CCG5","SLED0_FUSB
> > > 302_INT",
> > > > > +
> > >
> "SLED0_MD_STBY_RESET","SLED0_MD_IOEXP_EN_FAULT","SLED0_MD_DIR","
> > > SLED0_MD_DECAY",
> > > > > +
> > >
> "SLED0_MD_MODE1","SLED0_MD_MODE2","SLED0_MD_MODE3","power-ho
> > > st0";
> > > >
> > > > Such as these...
> > > >
> > > > > --
> > > > > 2.25.1
> > > > >
> > > >
> > > > Otherwise,
> > > >
> > > > Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
> > >
> > > Thanks for reviewing.
> > >
> > > Howard, I'm merging patches for v5.17 but I can't apply this until you
> > > fix the warnings I mentioned.
> > >
> > > Cheers,
> > >
> > > Jeol
> > > >
> > > > --
> > > > Patrick Williams
Joel Stanley Dec. 7, 2021, 6:37 a.m. UTC | #7
On Tue, 7 Dec 2021 at 06:34, Howard Chiu (邱冠睿) <Howard.Chiu@quantatw.com> wrote:
>
> Hi Joel
>
> > I'd suggest no, omit those features for now, and you can add them in
> > once we have a driver. The device tree bindings for the tach/pwm need
> > some work before they can be approved.
>
> The driver you mentioned is for OpenBMC Linux or upstream?
> If it is for OpenBMC, the upstream robot will reject my DTS because the aspeed-g6.dtsi did not contain pwm/tach node.
>
> If it is for upstream, it will be a long time that OpenBMC Linux won't have tach driver for ast2600 series, and my patch to commit with Billy's early driver for OpenBMC Linux is also meaningless.

Once we've fixed the issues with the bindings, we can put the driver
in the openbmc tree. Let's spend our effort fixing that.

>
> > When I asked you to fix the patch, I was referring to the usb-c
> > warnings that I posted about the other week.
> I will fix it and others you mentioned in the v7 patch.
>
> Howard
>
> > -----Original Message-----
> > From: Joel Stanley <joel@jms.id.au>
> > Sent: Tuesday, December 7, 2021 11:30 AM
> > To: Howard Chiu (邱冠睿) <Howard.Chiu@quantatw.com>
> > Cc: Patrick Williams <patrick@stwcx.xyz>; Howard Chiu
> > <howard10703049@gmail.com>; Arnd Bergmann <arnd@arndb.de>; Olof
> > Johansson <olof@lixom.net>; SoC Team <soc@kernel.org>; Rob Herring
> > <robh+dt@kernel.org>; Andrew Jeffery <andrew@aj.id.au>; Linux ARM
> > <linux-arm-kernel@lists.infradead.org>; devicetree
> > <devicetree@vger.kernel.org>; Linux Kernel Mailing List
> > <linux-kernel@vger.kernel.org>; linux-aspeed <linux-aspeed@lists.ozlabs.org>
> > Subject: Re: [PATCH v6] ARM: dts: aspeed: Adding Facebook Bletchley BMC
> >
> > On Tue, 7 Dec 2021 at 02:53, Howard Chiu (邱冠睿)
> > <Howard.Chiu@quantatw.com> wrote:
> > >
> > > Hi Joel
> > >
> > > Bletchley platform needs to support fan control.
> > > Since Billy's patch for upstream is still under review, I can't add pwm/tach
> > node into dts or the build would fail.
> > >
> > > As you know, I had committed the pwm/tach driver for ast26xx to OpenBMC
> > linux, could I commit the dts to OpenBMC linux instead of upstream for early
> > build?
> >
> > I'd suggest no, omit those features for now, and you can add them in
> > once we have a driver. The device tree bindings for the tach/pwm need
> > some work before they can be approved.
> >
> > When I asked you to fix the patch, I was referring to the usb-c
> > warnings that I posted about the other week.
> >
> > >
> > > Howard
> > >
> > > > -----Original Message-----
> > > > From: Joel Stanley <joel@jms.id.au>
> > > > Sent: Tuesday, December 7, 2021 6:52 AM
> > > > To: Patrick Williams <patrick@stwcx.xyz>
> > > > Cc: Howard Chiu <howard10703049@gmail.com>; Arnd Bergmann
> > > > <arnd@arndb.de>; Olof Johansson <olof@lixom.net>; SoC Team
> > > > <soc@kernel.org>; Rob Herring <robh+dt@kernel.org>; Andrew Jeffery
> > > > <andrew@aj.id.au>; Linux ARM <linux-arm-kernel@lists.infradead.org>;
> > > > devicetree <devicetree@vger.kernel.org>; Linux Kernel Mailing List
> > > > <linux-kernel@vger.kernel.org>; linux-aspeed
> > <linux-aspeed@lists.ozlabs.org>;
> > > > Howard Chiu (邱冠睿) <Howard.Chiu@quantatw.com>
> > > > Subject: Re: [PATCH v6] ARM: dts: aspeed: Adding Facebook Bletchley BMC
> > > >
> > > > On Mon, 6 Dec 2021 at 21:25, Patrick Williams <patrick@stwcx.xyz> wrote:
> > > > >
> > > > > On Wed, Dec 01, 2021 at 11:37:38AM +0800, Howard Chiu wrote:
> > > > > > Initial introduction of Facebook Bletchley equipped with
> > > > > > Aspeed 2600 BMC SoC.
> > > > > >
> > > > > > Signed-off-by: Howard Chiu <howard.chiu@quantatw.com>
> > > > > >
> > > > >
> > > > > ...
> > > > >
> > > > > > Change since v2:
> > > > > > - Remove uart5 workaround
> > > > > > - Remove gpio nodes of pca9552/pca9539
> > > > > > - Modify gpio-line-name of led/power/presence pins with openbmc
> > > > pattern
> > > > >
> > > > > A number of the GPIOs do not have defined openbmc patterns for them
> > yet.
> > > > The
> > > > > names you have chosen are ok for now, but we will be changing them as
> > we
> > > > refine
> > > > > development of this machine further.
> > > > >
> > > > > > +             gpio-line-names =
> > > > > > +
> > > >
> > "SLED0_MS_DETECT1","SLED0_VBUS_BMC_EN","SLED0_INA230_ALERT","SLE
> > > > D0_P12V_STBY_ALERT",
> > > > > > +
> > > >
> > "SLED0_SSD_ALERT","SLED0_MS_DETECT0","SLED0_RST_CCG5","SLED0_FUSB
> > > > 302_INT",
> > > > > > +
> > > >
> > "SLED0_MD_STBY_RESET","SLED0_MD_IOEXP_EN_FAULT","SLED0_MD_DIR","
> > > > SLED0_MD_DECAY",
> > > > > > +
> > > >
> > "SLED0_MD_MODE1","SLED0_MD_MODE2","SLED0_MD_MODE3","power-ho
> > > > st0";
> > > > >
> > > > > Such as these...
> > > > >
> > > > > > --
> > > > > > 2.25.1
> > > > > >
> > > > >
> > > > > Otherwise,
> > > > >
> > > > > Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
> > > >
> > > > Thanks for reviewing.
> > > >
> > > > Howard, I'm merging patches for v5.17 but I can't apply this until you
> > > > fix the warnings I mentioned.
> > > >
> > > > Cheers,
> > > >
> > > > Jeol
> > > > >
> > > > > --
> > > > > Patrick Williams
Howard Chiu (邱冠睿) Dec. 7, 2021, 6:42 a.m. UTC | #8
Hi Joel

> Once we've fixed the issues with the bindings, we can put the driver
> in the openbmc tree. Let's spend our effort fixing that.
It means I can commit Bletchley DTS with fan support to OpenBMC tree once Billy's driver got approved, right?

Howard

> -----Original Message-----
> From: Joel Stanley <joel@jms.id.au>
> Sent: Tuesday, December 7, 2021 2:37 PM
> To: Howard Chiu (邱冠睿) <Howard.Chiu@quantatw.com>
> Cc: Patrick Williams <patrick@stwcx.xyz>; Howard Chiu
> <howard10703049@gmail.com>; Arnd Bergmann <arnd@arndb.de>; Olof
> Johansson <olof@lixom.net>; SoC Team <soc@kernel.org>; Rob Herring
> <robh+dt@kernel.org>; Andrew Jeffery <andrew@aj.id.au>; Linux ARM
> <linux-arm-kernel@lists.infradead.org>; devicetree
> <devicetree@vger.kernel.org>; Linux Kernel Mailing List
> <linux-kernel@vger.kernel.org>; linux-aspeed <linux-aspeed@lists.ozlabs.org>
> Subject: Re: [PATCH v6] ARM: dts: aspeed: Adding Facebook Bletchley BMC
> 
> On Tue, 7 Dec 2021 at 06:34, Howard Chiu (邱冠睿)
> <Howard.Chiu@quantatw.com> wrote:
> >
> > Hi Joel
> >
> > > I'd suggest no, omit those features for now, and you can add them in
> > > once we have a driver. The device tree bindings for the tach/pwm need
> > > some work before they can be approved.
> >
> > The driver you mentioned is for OpenBMC Linux or upstream?
> > If it is for OpenBMC, the upstream robot will reject my DTS because the
> aspeed-g6.dtsi did not contain pwm/tach node.
> >
> > If it is for upstream, it will be a long time that OpenBMC Linux won't have
> tach driver for ast2600 series, and my patch to commit with Billy's early driver
> for OpenBMC Linux is also meaningless.
> 
> Once we've fixed the issues with the bindings, we can put the driver
> in the openbmc tree. Let's spend our effort fixing that.
> 
> >
> > > When I asked you to fix the patch, I was referring to the usb-c
> > > warnings that I posted about the other week.
> > I will fix it and others you mentioned in the v7 patch.
> >
> > Howard
> >
> > > -----Original Message-----
> > > From: Joel Stanley <joel@jms.id.au>
> > > Sent: Tuesday, December 7, 2021 11:30 AM
> > > To: Howard Chiu (邱冠睿) <Howard.Chiu@quantatw.com>
> > > Cc: Patrick Williams <patrick@stwcx.xyz>; Howard Chiu
> > > <howard10703049@gmail.com>; Arnd Bergmann <arnd@arndb.de>; Olof
> > > Johansson <olof@lixom.net>; SoC Team <soc@kernel.org>; Rob Herring
> > > <robh+dt@kernel.org>; Andrew Jeffery <andrew@aj.id.au>; Linux ARM
> > > <linux-arm-kernel@lists.infradead.org>; devicetree
> > > <devicetree@vger.kernel.org>; Linux Kernel Mailing List
> > > <linux-kernel@vger.kernel.org>; linux-aspeed
> <linux-aspeed@lists.ozlabs.org>
> > > Subject: Re: [PATCH v6] ARM: dts: aspeed: Adding Facebook Bletchley BMC
> > >
> > > On Tue, 7 Dec 2021 at 02:53, Howard Chiu (邱冠睿)
> > > <Howard.Chiu@quantatw.com> wrote:
> > > >
> > > > Hi Joel
> > > >
> > > > Bletchley platform needs to support fan control.
> > > > Since Billy's patch for upstream is still under review, I can't add pwm/tach
> > > node into dts or the build would fail.
> > > >
> > > > As you know, I had committed the pwm/tach driver for ast26xx to
> OpenBMC
> > > linux, could I commit the dts to OpenBMC linux instead of upstream for
> early
> > > build?
> > >
> > > I'd suggest no, omit those features for now, and you can add them in
> > > once we have a driver. The device tree bindings for the tach/pwm need
> > > some work before they can be approved.
> > >
> > > When I asked you to fix the patch, I was referring to the usb-c
> > > warnings that I posted about the other week.
> > >
> > > >
> > > > Howard
> > > >
> > > > > -----Original Message-----
> > > > > From: Joel Stanley <joel@jms.id.au>
> > > > > Sent: Tuesday, December 7, 2021 6:52 AM
> > > > > To: Patrick Williams <patrick@stwcx.xyz>
> > > > > Cc: Howard Chiu <howard10703049@gmail.com>; Arnd Bergmann
> > > > > <arnd@arndb.de>; Olof Johansson <olof@lixom.net>; SoC Team
> > > > > <soc@kernel.org>; Rob Herring <robh+dt@kernel.org>; Andrew Jeffery
> > > > > <andrew@aj.id.au>; Linux ARM
> <linux-arm-kernel@lists.infradead.org>;
> > > > > devicetree <devicetree@vger.kernel.org>; Linux Kernel Mailing List
> > > > > <linux-kernel@vger.kernel.org>; linux-aspeed
> > > <linux-aspeed@lists.ozlabs.org>;
> > > > > Howard Chiu (邱冠睿) <Howard.Chiu@quantatw.com>
> > > > > Subject: Re: [PATCH v6] ARM: dts: aspeed: Adding Facebook Bletchley
> BMC
> > > > >
> > > > > On Mon, 6 Dec 2021 at 21:25, Patrick Williams <patrick@stwcx.xyz>
> wrote:
> > > > > >
> > > > > > On Wed, Dec 01, 2021 at 11:37:38AM +0800, Howard Chiu wrote:
> > > > > > > Initial introduction of Facebook Bletchley equipped with
> > > > > > > Aspeed 2600 BMC SoC.
> > > > > > >
> > > > > > > Signed-off-by: Howard Chiu <howard.chiu@quantatw.com>
> > > > > > >
> > > > > >
> > > > > > ...
> > > > > >
> > > > > > > Change since v2:
> > > > > > > - Remove uart5 workaround
> > > > > > > - Remove gpio nodes of pca9552/pca9539
> > > > > > > - Modify gpio-line-name of led/power/presence pins with openbmc
> > > > > pattern
> > > > > >
> > > > > > A number of the GPIOs do not have defined openbmc patterns for
> them
> > > yet.
> > > > > The
> > > > > > names you have chosen are ok for now, but we will be changing them
> as
> > > we
> > > > > refine
> > > > > > development of this machine further.
> > > > > >
> > > > > > > +             gpio-line-names =
> > > > > > > +
> > > > >
> > >
> "SLED0_MS_DETECT1","SLED0_VBUS_BMC_EN","SLED0_INA230_ALERT","SLE
> > > > > D0_P12V_STBY_ALERT",
> > > > > > > +
> > > > >
> > >
> "SLED0_SSD_ALERT","SLED0_MS_DETECT0","SLED0_RST_CCG5","SLED0_FUSB
> > > > > 302_INT",
> > > > > > > +
> > > > >
> > >
> "SLED0_MD_STBY_RESET","SLED0_MD_IOEXP_EN_FAULT","SLED0_MD_DIR","
> > > > > SLED0_MD_DECAY",
> > > > > > > +
> > > > >
> > >
> "SLED0_MD_MODE1","SLED0_MD_MODE2","SLED0_MD_MODE3","power-ho
> > > > > st0";
> > > > > >
> > > > > > Such as these...
> > > > > >
> > > > > > > --
> > > > > > > 2.25.1
> > > > > > >
> > > > > >
> > > > > > Otherwise,
> > > > > >
> > > > > > Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
> > > > >
> > > > > Thanks for reviewing.
> > > > >
> > > > > Howard, I'm merging patches for v5.17 but I can't apply this until you
> > > > > fix the warnings I mentioned.
> > > > >
> > > > > Cheers,
> > > > >
> > > > > Jeol
> > > > > >
> > > > > > --
> > > > > > Patrick Williams
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 0de64f237cd8..b804b577010a 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1482,6 +1482,7 @@  dtb-$(CONFIG_ARCH_ASPEED) += \
 	aspeed-bmc-arm-stardragon4800-rep2.dtb \
 	aspeed-bmc-asrock-e3c246d4i.dtb \
 	aspeed-bmc-bytedance-g220a.dtb \
+	aspeed-bmc-facebook-bletchley.dtb \
 	aspeed-bmc-facebook-cloudripper.dtb \
 	aspeed-bmc-facebook-cmm.dtb \
 	aspeed-bmc-facebook-elbert.dtb \
diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts
new file mode 100644
index 000000000000..c013ebe1704a
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts
@@ -0,0 +1,760 @@ 
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2021 Facebook Inc.
+/dts-v1/;
+
+#include "aspeed-g6.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+#include <dt-bindings/usb/pd.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+	model = "Facebook Bletchley BMC";
+	compatible = "facebook,bletchley-bmc", "aspeed,ast2600";
+
+	aliases {
+		serial4 = &uart5;
+	};
+
+	chosen {
+		bootargs = "console=ttyS4,57600n8";
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x80000000 0x80000000>;
+	};
+
+	iio-hwmon {
+		compatible = "iio-hwmon";
+		io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
+			<&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
+			<&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>,
+			<&adc1 4>, <&adc1 5>, <&adc1 6>, <&adc1 7>;
+	};
+
+	spi_gpio: spi-gpio {
+		status = "okay";
+		compatible = "spi-gpio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		gpio-sck = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
+		gpio-mosi = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
+		gpio-miso = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>;
+		num-chipselects = <1>;
+		cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
+
+		tpmdev@0 {
+			compatible = "tcg,tpm_tis-spi";
+			spi-max-frequency = <33000000>;
+			reg = <0>;
+		};
+	};
+
+	switchphy: ethernet-phy@0 {
+		// Fixed-link
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		sys_log_id {
+			retain-state-shutdown;
+			default-state = "keep";
+			gpios = <&front_leds 0 GPIO_ACTIVE_HIGH>;
+		};
+		fan0_blue {
+			retain-state-shutdown;
+			default-state = "on";
+			gpios = <&fan_ioexp 8 GPIO_ACTIVE_HIGH>;
+		};
+		fan1_blue {
+			retain-state-shutdown;
+			default-state = "on";
+			gpios = <&fan_ioexp 9 GPIO_ACTIVE_HIGH>;
+		};
+		fan2_blue {
+			retain-state-shutdown;
+			default-state = "on";
+			gpios = <&fan_ioexp 10 GPIO_ACTIVE_HIGH>;
+		};
+		fan3_blue {
+			retain-state-shutdown;
+			default-state = "on";
+			gpios = <&fan_ioexp 11 GPIO_ACTIVE_HIGH>;
+		};
+		fan0_amber {
+			retain-state-shutdown;
+			default-state = "off";
+			gpios = <&fan_ioexp 12 GPIO_ACTIVE_HIGH>;
+		};
+		fan1_amber {
+			retain-state-shutdown;
+			default-state = "off";
+			gpios = <&fan_ioexp 13 GPIO_ACTIVE_HIGH>;
+		};
+		fan2_amber {
+			retain-state-shutdown;
+			default-state = "off";
+			gpios = <&fan_ioexp 14 GPIO_ACTIVE_HIGH>;
+		};
+		fan3_amber {
+			retain-state-shutdown;
+			default-state = "off";
+			gpios = <&fan_ioexp 15 GPIO_ACTIVE_HIGH>;
+		};
+		sled0_amber {
+			retain-state-shutdown;
+			default-state = "off";
+			gpios = <&sled0_leds 0 GPIO_ACTIVE_LOW>;
+		};
+		sled0_blue {
+			retain-state-shutdown;
+			default-state = "off";
+			gpios = <&sled0_leds 1 GPIO_ACTIVE_LOW>;
+		};
+		sled1_amber {
+			retain-state-shutdown;
+			default-state = "off";
+			gpios = <&sled1_leds 0 GPIO_ACTIVE_LOW>;
+		};
+		sled1_blue {
+			retain-state-shutdown;
+			default-state = "off";
+			gpios = <&sled1_leds 1 GPIO_ACTIVE_LOW>;
+		};
+		sled2_amber {
+			retain-state-shutdown;
+			default-state = "off";
+			gpios = <&sled2_leds 0 GPIO_ACTIVE_LOW>;
+		};
+		sled2_blue {
+			retain-state-shutdown;
+			default-state = "off";
+			gpios = <&sled2_leds 1 GPIO_ACTIVE_LOW>;
+		};
+		sled3_amber {
+			retain-state-shutdown;
+			default-state = "off";
+			gpios = <&sled3_leds 0 GPIO_ACTIVE_LOW>;
+		};
+		sled3_blue {
+			retain-state-shutdown;
+			default-state = "off";
+			gpios = <&sled3_leds 1 GPIO_ACTIVE_LOW>;
+		};
+		sled4_amber {
+			retain-state-shutdown;
+			default-state = "off";
+			gpios = <&sled4_leds 0 GPIO_ACTIVE_LOW>;
+		};
+		sled4_blue {
+			retain-state-shutdown;
+			default-state = "off";
+			gpios = <&sled4_leds 1 GPIO_ACTIVE_LOW>;
+		};
+		sled5_amber {
+			retain-state-shutdown;
+			default-state = "off";
+			gpios = <&sled5_leds 0 GPIO_ACTIVE_LOW>;
+		};
+		sled5_blue {
+			retain-state-shutdown;
+			default-state = "off";
+			gpios = <&sled5_leds 1 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&mac2 {
+	status = "okay";
+	phy-mode = "rgmii";
+	phy-handle = <&switchphy>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_rgmii3_default>;
+
+	fixed-link {
+		speed = <1000>;
+		full-duplex;
+	};
+};
+
+&rtc {
+	status = "okay";
+};
+
+&fmc {
+	status = "okay";
+	flash@0 {
+		status = "okay";
+		m25p,fast-read;
+		label = "bmc";
+		spi-max-frequency = <50000000>;
+#include "openbmc-flash-layout-128.dtsi"
+	};
+};
+
+&spi2 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_spi2_default>;
+
+	flash@0 {
+		status = "okay";
+		m25p,fast-read;
+		label = "pnor";
+		spi-max-frequency = <100000000>;
+	};
+};
+
+&i2c0 {
+	status = "okay";
+	/* TODO: Add ADC INA230 */
+
+	mp5023@40 {
+		compatible = "pmbus";
+		reg = <0x40>;
+	};
+
+	tmp421@4f {
+		compatible = "ti,tmp421";
+		reg = <0x4f>;
+	};
+
+	sled0_ioexp: pca9539@76 {
+		compatible = "nxp,pca9539";
+		reg = <0x76>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio-line-names =
+		"SLED0_MS_DETECT1","SLED0_VBUS_BMC_EN","SLED0_INA230_ALERT","SLED0_P12V_STBY_ALERT",
+		"SLED0_SSD_ALERT","SLED0_MS_DETECT0","SLED0_RST_CCG5","SLED0_FUSB302_INT",
+		"SLED0_MD_STBY_RESET","SLED0_MD_IOEXP_EN_FAULT","SLED0_MD_DIR","SLED0_MD_DECAY",
+		"SLED0_MD_MODE1","SLED0_MD_MODE2","SLED0_MD_MODE3","power-host0";
+	};
+
+	sled0_leds: pca9552@67 {
+		compatible = "nxp,pca9552";
+		reg = <0x67>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio-line-names =
+		"led-sled0-amber","led-sled0-blue","SLED0_RST_IOEXP","",
+		"","","","",
+		"","","","",
+		"","","","";
+	};
+
+	sled0_fusb302: typec-portc@54 {
+		compatible = "fcs,fusb302";
+		reg = <0x22>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <ASPEED_GPIO(M, 0) IRQ_TYPE_LEVEL_LOW>;
+
+		connector {
+			compatible = "usb-c-connector";
+			label = "USB-C";
+			power-role = "dual";
+			try-power-role = "sink";
+			source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
+			sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
+					PDO_VAR(3000, 12000, 3000)
+					PDO_PPS_APDO(3000, 11000, 3000)>;
+			op-sink-microwatt = <10000000>;
+		};
+	};
+};
+
+&i2c1 {
+	status = "okay";
+	/* TODO: Add ADC INA230 */
+
+	mp5023@40 {
+		compatible = "pmbus";
+		reg = <0x40>;
+	};
+
+	tmp421@4f {
+		compatible = "ti,tmp421";
+		reg = <0x4f>;
+	};
+
+	sled1_ioexp: pca9539@76 {
+		compatible = "nxp,pca9539";
+		reg = <0x76>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio-line-names =
+		"SLED1_MS_DETECT1","SLED1_VBUS_BMC_EN","SLED1_INA230_ALERT","SLED1_P12V_STBY_ALERT",
+		"SLED1_SSD_ALERT","SLED1_MS_DETECT0","SLED1_RST_CCG5","SLED1_FUSB302_INT",
+		"SLED1_MD_STBY_RESET","SLED1_MD_IOEXP_EN_FAULT","SLED1_MD_DIR","SLED1_MD_DECAY",
+		"SLED1_MD_MODE1","SLED1_MD_MODE2","SLED1_MD_MODE3","power-host1";
+	};
+
+	sled1_leds: pca9552@67 {
+		compatible = "nxp,pca9552";
+		reg = <0x67>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio-line-names =
+		"led-sled1-amber","led-sled1-blue","SLED1_RST_IOEXP","",
+		"","","","",
+		"","","","",
+		"","","","";
+	};
+
+	sled1_fusb302: typec-portc@54 {
+		compatible = "fcs,fusb302";
+		reg = <0x22>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <ASPEED_GPIO(M, 1) IRQ_TYPE_LEVEL_LOW>;
+
+		connector {
+			compatible = "usb-c-connector";
+			label = "USB-C";
+			power-role = "dual";
+			try-power-role = "sink";
+			source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
+			sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
+					PDO_VAR(3000, 12000, 3000)
+					PDO_PPS_APDO(3000, 11000, 3000)>;
+			op-sink-microwatt = <10000000>;
+		};
+	};
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&i2c2 {
+	status = "okay";
+	/* TODO: Add ADC INA230 */
+
+	mp5023@40 {
+		compatible = "pmbus";
+		reg = <0x40>;
+	};
+
+	tmp421@4f {
+		compatible = "ti,tmp421";
+		reg = <0x4f>;
+	};
+
+	sled2_ioexp: pca9539@76 {
+		compatible = "nxp,pca9539";
+		reg = <0x76>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio-line-names =
+		"SLED2_MS_DETECT1","SLED2_VBUS_BMC_EN","SLED2_INA230_ALERT","SLED2_P12V_STBY_ALERT",
+		"SLED2_SSD_ALERT","SLED2_MS_DETECT0","SLED2_RST_CCG5","SLED2_FUSB302_INT",
+		"SLED2_MD_STBY_RESET","SLED2_MD_IOEXP_EN_FAULT","SLED2_MD_DIR","SLED2_MD_DECAY",
+		"SLED2_MD_MODE1","SLED2_MD_MODE2","SLED2_MD_MODE3","power-host2";
+	};
+
+	sled2_leds: pca9552@67 {
+		compatible = "nxp,pca9552";
+		reg = <0x67>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio-line-names =
+		"led-sled2-amber","led-sled2-blue","SLED2_RST_IOEXP","",
+		"","","","",
+		"","","","",
+		"","","","";
+	};
+
+	sled2_fusb302: typec-portc@54 {
+		compatible = "fcs,fusb302";
+		reg = <0x22>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <ASPEED_GPIO(M, 2) IRQ_TYPE_LEVEL_LOW>;
+
+		connector {
+			compatible = "usb-c-connector";
+			label = "USB-C";
+			power-role = "dual";
+			try-power-role = "sink";
+			data-role = "dual";
+			source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
+			sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
+					PDO_VAR(3000, 12000, 3000)
+					PDO_PPS_APDO(3000, 11000, 3000)>;
+			op-sink-microwatt = <10000000>;
+		};
+	};
+};
+
+&i2c3 {
+	status = "okay";
+	/* TODO: Add ADC INA230 */
+
+	mp5023@40 {
+		compatible = "pmbus";
+		reg = <0x40>;
+	};
+
+	tmp421@4f {
+		compatible = "ti,tmp421";
+		reg = <0x4f>;
+	};
+
+	sled3_ioexp: pca9539@76 {
+		compatible = "nxp,pca9539";
+		reg = <0x76>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio-line-names =
+		"SLED3_MS_DETECT1","SLED3_VBUS_BMC_EN","SLED3_INA230_ALERT","SLED3_P12V_STBY_ALERT",
+		"SLED3_SSD_ALERT","SLED3_MS_DETECT0","SLED3_RST_CCG5","SLED3_FUSB302_INT",
+		"SLED3_MD_STBY_RESET","SLED3_MD_IOEXP_EN_FAULT","SLED3_MD_DIR","SLED3_MD_DECAY",
+		"SLED3_MD_MODE1","SLED3_MD_MODE2","SLED3_MD_MODE3","power-host3";
+	};
+
+	sled3_leds: pca9552@67 {
+		compatible = "nxp,pca9552";
+		reg = <0x67>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio-line-names =
+		"led-sled3-amber","led-sled3-blue","SLED3_RST_IOEXP","",
+		"","","","",
+		"","","","",
+		"","","","";
+	};
+
+	sled3_fusb302: typec-portc@54 {
+		compatible = "fcs,fusb302";
+		reg = <0x22>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <ASPEED_GPIO(M, 3) IRQ_TYPE_LEVEL_LOW>;
+
+		connector {
+			compatible = "usb-c-connector";
+			label = "USB-C";
+			power-role = "dual";
+			try-power-role = "sink";
+			data-role = "dual";
+			source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
+			sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
+					PDO_VAR(3000, 12000, 3000)
+					PDO_PPS_APDO(3000, 11000, 3000)>;
+			op-sink-microwatt = <10000000>;
+		};
+	};
+};
+
+&i2c4 {
+	status = "okay";
+	/* TODO: Add ADC INA230 */
+
+	mp5023@40 {
+		compatible = "pmbus";
+		reg = <0x40>;
+	};
+
+	tmp421@4f {
+		compatible = "ti,tmp421";
+		reg = <0x4f>;
+	};
+
+	sled4_ioexp: pca9539@76 {
+		compatible = "nxp,pca9539";
+		reg = <0x76>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio-line-names =
+		"SLED4_MS_DETECT1","SLED4_VBUS_BMC_EN","SLED4_INA230_ALERT","SLED4_P12V_STBY_ALERT",
+		"SLED4_SSD_ALERT","SLED4_MS_DETECT0","SLED4_RST_CCG5","SLED4_FUSB302_INT",
+		"SLED4_MD_STBY_RESET","SLED4_MD_IOEXP_EN_FAULT","SLED4_MD_DIR","SLED4_MD_DECAY",
+		"SLED4_MD_MODE1","SLED4_MD_MODE2","SLED4_MD_MODE3","power-host4";
+	};
+
+	sled4_leds: pca9552@67 {
+		compatible = "nxp,pca9552";
+		reg = <0x67>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio-line-names =
+		"led-sled4-amber","led-sled4-blue","SLED4_RST_IOEXP","",
+		"","","","",
+		"","","","",
+		"","","","";
+	};
+
+	sled4_fusb302: typec-portc@54 {
+		compatible = "fcs,fusb302";
+		reg = <0x22>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <ASPEED_GPIO(M, 4) IRQ_TYPE_LEVEL_LOW>;
+
+		connector {
+			compatible = "usb-c-connector";
+			label = "USB-C";
+			power-role = "dual";
+			try-power-role = "sink";
+			source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
+			sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
+					PDO_VAR(3000, 12000, 3000)
+					PDO_PPS_APDO(3000, 11000, 3000)>;
+			op-sink-microwatt = <10000000>;
+		};
+	};
+};
+
+&i2c5 {
+	status = "okay";
+	/* TODO: Add ADC INA230 */
+
+	mp5023@40 {
+		compatible = "pmbus";
+		reg = <0x40>;
+	};
+
+	tmp421@4f {
+		compatible = "ti,tmp421";
+		reg = <0x4f>;
+	};
+
+	sled5_ioexp: pca9539@76 {
+		compatible = "nxp,pca9539";
+		reg = <0x76>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio-line-names =
+		"SLED5_MS_DETECT1","SLED5_VBUS_BMC_EN","SLED5_INA230_ALERT","SLED5_P12V_STBY_ALERT",
+		"SLED5_SSD_ALERT","SLED5_MS_DETECT0","SLED5_RST_CCG5","SLED5_FUSB302_INT",
+		"SLED5_MD_STBY_RESET","SLED5_MD_IOEXP_EN_FAULT","SLED5_MD_DIR","SLED5_MD_DECAY",
+		"SLED5_MD_MODE1","SLED5_MD_MODE2","SLED5_MD_MODE3","power-host5";
+	};
+
+	sled5_leds: pca9552@67 {
+		compatible = "nxp,pca9552";
+		reg = <0x67>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio-line-names =
+		"led-sled5-amber","led-sled5-blue","SLED5_RST_IOEXP","",
+		"","","","",
+		"","","","",
+		"","","","";
+	};
+
+	sled5_fusb302: typec-portc@54 {
+		compatible = "fcs,fusb302";
+		reg = <0x22>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <ASPEED_GPIO(M, 5) IRQ_TYPE_LEVEL_LOW>;
+
+		connector {
+			compatible = "usb-c-connector";
+			label = "USB-C";
+			power-role = "dual";
+			try-power-role = "sink";
+			source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
+			sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
+					PDO_VAR(3000, 12000, 3000)
+					PDO_PPS_APDO(3000, 11000, 3000)>;
+			op-sink-microwatt = <10000000>;
+		};
+	};
+};
+
+&i2c6 {
+	status = "okay";
+
+	eeprom@56 {
+		compatible = "atmel,24c64";
+		reg = <0x56>;
+	};
+
+	rtc@51 {
+		compatible = "nxp,pcf85263";
+		reg = <0x51>;
+	};
+};
+
+&i2c7 {
+	status = "okay";
+
+	eeprom@54 {
+		compatible = "atmel,24c64";
+		reg = <0x54>;
+	};
+};
+
+&i2c9 {
+	status = "okay";
+
+	tmp421@4f {
+		compatible = "ti,tmp421";
+		reg = <0x4f>;
+	};
+};
+
+&i2c10 {
+	status = "okay";
+
+	tmp421@4f {
+		compatible = "ti,tmp421";
+		reg = <0x4f>;
+	};
+
+	hdc1080@40 {
+		compatible = "ti,hdc1080";
+		reg = <0x40>;
+	};
+
+	front_leds: pca9552@67 {
+		compatible = "nxp,pca9552";
+		reg = <0x67>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio-line-names =
+		"led-fault-identify","power-p5v-stby-good",
+		"power-p1v0-dvdd-good","power-p1v0-avdd-good",
+		"","","","",
+		"","","","",
+		"","","","";
+	};
+};
+
+&i2c12 {
+	status = "okay";
+
+	adm1278@11 {
+		compatible = "adi,adm1278";
+		reg = <0x11>;
+	};
+
+	tmp421@4c {
+		compatible = "ti,tmp421";
+		reg = <0x4c>;
+	};
+
+	tmp421@4d {
+		compatible = "ti,tmp421";
+		reg = <0x4d>;
+	};
+
+	fan_ioexp: pca9552@67 {
+		compatible = "nxp,pca9552";
+		reg = <0x67>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		gpio-line-names =
+		"presence-fan0","presence-fan1",
+		"presence-fan2","presence-fan3",
+		"power-fan0-good","power-fan1-good",
+		"power-fan2-good","power-fan3-good",
+		"","","","",
+		"","","","";
+	};
+};
+
+&i2c13 {
+	multi-master;
+	aspeed,hw-timeout-ms = <1000>;
+	status = "okay";
+};
+
+&gpio0 {
+	gpio-line-names =
+	/*A0-A7*/	"","","","","","","","",
+	/*B0-B7*/	"","","","","","","","",
+	/*C0-C7*/	"","","","","","","","",
+	/*D0-D7*/	"","","","","","","","",
+	/*E0-E7*/	"","","","","","","","",
+	/*F0-F7*/	"","","","","","","","",
+	/*G0-G7*/	"","","","","","","","",
+	/*H0-H7*/	"presence-riser1","presence-riser2",
+			"presence-sled0","presence-sled1",
+			"presence-sled2","presence-sled3",
+			"presence-sled4","presence-sled5",
+	/*I0-I7*/	"","","","","","","","",
+	/*J0-J7*/	"","","","","","","","",
+	/*K0-K7*/	"","","","","","","","",
+	/*L0-L7*/	"","","","","","","","",
+	/*M0-M7*/	"alert_sled0","alert_sled1",
+			"alert_sled2","alert_sled3",
+			"alert_sled4","alert_sled5",
+			"p12v_aux_alert1","",
+	/*N0-N7*/	"","","","","","","","",
+	/*O0-O7*/	"","","","","","","","",
+	/*P0-P7*/	"","","","","","","","",
+	/*Q0-Q7*/	"","","","","","","","",
+	/*R0-R7*/	"","","","","","","","",
+	/*S0-S7*/	"","","","","","","","",
+	/*T0-T7*/	"","","","","","","","",
+	/*U0-U7*/	"","","","","","","","",
+	/*V0-V7*/	"","","","","","","","",
+	/*W0-W7*/	"","","","","","","","",
+	/*X0-X7*/	"","","","","","","","",
+	/*Y0-Y7*/	"","","","","","","","",
+	/*Z0-Z7*/	"","","","","","","","";
+};
+
+&adc0 {
+	vref = <1800>;
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
+		&pinctrl_adc2_default &pinctrl_adc3_default
+		&pinctrl_adc4_default &pinctrl_adc5_default
+		&pinctrl_adc6_default &pinctrl_adc7_default>;
+};
+
+&adc1 {
+	vref = <2500>;
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default
+		&pinctrl_adc10_default &pinctrl_adc11_default
+		&pinctrl_adc12_default &pinctrl_adc13_default
+		&pinctrl_adc14_default &pinctrl_adc15_default>;
+};