| Message ID | 20210907194931.1173750-1-osk@google.com |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | ARM: dts: aspeed: Add TYAN S7106 BMC machine | expand |
On Tue, 7 Sept 2021 at 19:49, Oskar Senft <osk@google.com> wrote: > > The TYAN S7106 is a server platform with an ASPEED AST2500 BMC. Looks good Oskar. Some minor improvements suggested below. I'll pull this in to the openbmc tree once it's looking good, so there's no need to resend it separately in this case. Please do cc linux-arm-kernel@lists.infradead.org when submitting patches upstream. > Signed-off-by: Oskar Senft <osk@google.com> > --- > arch/arm/boot/dts/aspeed-bmc-tyan-s7106.dts | 415 ++++++++++++++++++++ > 1 file changed, 415 insertions(+) > create mode 100644 arch/arm/boot/dts/aspeed-bmc-tyan-s7106.dts You need to add this to arch/arm/boot/dts/Makefile so it is built. > diff --git a/arch/arm/boot/dts/aspeed-bmc-tyan-s7106.dts b/arch/arm/boot/dts/aspeed-bmc-tyan-s7106.dts > new file mode 100644 > index 000000000000..292bfb1a4bb2 > --- /dev/null > +++ b/arch/arm/boot/dts/aspeed-bmc-tyan-s7106.dts > @@ -0,0 +1,415 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/dts-v1/; > + > +#include "aspeed-g5.dtsi" > +#include <dt-bindings/gpio/aspeed-gpio.h> > + > +/ { > + model = "Tyan S7106 BMC"; > + compatible = "tyan,s7106-bmc", "aspeed,ast2500"; > + > + chosen { > + stdout-path = &uart5; > + bootargs = "console=ttyS4,115200 earlyprintk"; s/earlyprintk/earlycon/ See 239566b032f3 ("ARM: dts: aspeed: Set earlycon boot argument") for background. > + }; > + > + memory@80000000 { > + device_type = "memory"; > + reg = <0x80000000 0x20000000>; > + }; > + > + reserved-memory { > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + > + p2a_memory: region@987F0000 { I think we're standardising on lower case for hex numbers. > + no-map; > + reg = <0x987F0000 0x00010000>; /* 64KB */ > + }; > + > + vga_memory: framebuffer@9f000000 { > + no-map; > + reg = <0x9f000000 0x01000000>; /* 16M */ > + }; > + > + gfx_memory: framebuffer { > + size = <0x01000000>; /* 16M */ > + alignment = <0x01000000>; > + compatible = "shared-dma-pool"; > + reusable; > + }; > + }; > +&mac0 { > + status = "okay"; > + > + use-ncsi; > + no-hw-checksum; Are you sure you need no-hw-checksum? Back in the day we disabled it when using ncsi on the ast2400, as we thought it was broken when using NCSI. That was not the case: commit 6aff0bf641cf69e487d7b46fc8be773d161f814d Author: Benjamin Herrenschmidt <benh@kernel.crashing.org> Date: Wed Apr 12 13:27:03 2017 +1000 ftgmac100: Disable HW checksum generation on AST2400, enable on others We found out that HW checksum generation only works from AST2500 onward. This disables it on AST2400 and removes the "no-hw-checksum" properties in the device-trees. The problem we had wasn't related to NC-SI. I suggest dropping the property. > + > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_rmii1_default>; > +}; > +&kcs1 { > + status = "okay"; > + kcs_addr = <0xca8>; This style of kcs binding is deprecated. Instead we use this form: aspeed,lpc-io-reg = <0xca8>; > +}; > + > +&kcs3 { > + status = "okay"; > + kcs_addr = <0xca2>; > +}; > + > +&gfx { > + status = "okay"; > + memory-region = <&gfx_memory>; This display device is for when the BMC is running to display it's own content. If the system is only showing the output from the host, then you don't need this enabled. > +}; > + > +&gpio { > + status = "okay"; > + gpio-line-names = > + /*A0-A7*/ "","","IDLED_N","","","","","", > + /*B0-B7*/ "","","","","","","","", > + /*C0-C7*/ "","","","","ID_BUTTON","POST_COMPLETE","","", > + /*D0-D7*/ "","","PS_PWROK","PLTRST_N","","","","", > + /*E0-E7*/ "POWER_BUTTON","POWER_OUT","RESET_BUTTON","RESET_OUT", > + "NMI_BUTTON","NMI_OUT","","HEARTBEAT_LED_N", We have a document that contains names for common BMC GPIOs: https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md Ideally your device tree would use them, but given this is an old platform then I understand if you want to maintain compatibility with existing userspace. > + /*F0-F7*/ "","CLEAR_CMOS_N","","","IPMI_ALERT_LED_N","","","", > + /*G0-G7*/ "BMC_PE_SMB_EN_1_N","BMC_PE_SMB_EN_2_N","","","","","","", > + /*H0-H7*/ "","","","","","","","", > + /*I0-I7*/ "","","","","","","","", > + /*J0-J7*/ "","","","","","","","", > + /*K0-K7*/ "","","","","","","","", > + /*L0-L7*/ "","","","","","","","", > + /*M0-M7*/ "","","","","","","","", > + /*N0-N7*/ "","","","","","","","", > + /*O0-O7*/ "","","","","","","","", > + /*P0-P7*/ "","","","","","","","", > + /*Q0-Q7*/ "","","","","BMC_PE_SMB_SW_BIT0","BMC_PE_SMB_SW_BIT1","","", > + /*R0-R7*/ "","","","","","","","", > + /*S0-S7*/ "","","","","","","","", > + /*T0-T7*/ "","","","","","","","", > + /*U0-U7*/ "","","","","","","","", > + /*V0-V7*/ "","","","","","","","", > + /*W0-W7*/ "","","","","","","","", > + /*X0-X7*/ "","","","","","","","", > + /*Y0-Y7*/ "","","","","","","","", > + /*Z0-Z7*/ "","","","","","","","", > + /*AA0-AA7*/ "","","","BMC_SMB3_PCH_IE_SML3_EN","","","","", > + /*AB0-AB7*/ "","","","","","","",""; > +}; > -- > 2.33.0.309.g3052b89438-goog >
Hey Joel Thank you so much for the super fast review! So many things have changed a bit since I worked on this DTS originally (years ago) - thanks for pointing me to the updates! I'll make the changes as recommended. > +&gpio { > > + status = "okay"; > > + gpio-line-names = > > + /*A0-A7*/ "","","IDLED_N","","","","","", > > + /*B0-B7*/ "","","","","","","","", > > + /*C0-C7*/ "","","","","ID_BUTTON","POST_COMPLETE","","", > > + /*D0-D7*/ "","","PS_PWROK","PLTRST_N","","","","", > > + /*E0-E7*/ > "POWER_BUTTON","POWER_OUT","RESET_BUTTON","RESET_OUT", > > + > "NMI_BUTTON","NMI_OUT","","HEARTBEAT_LED_N", > > We have a document that contains names for common BMC GPIOs: > > > https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md > > Ideally your device tree would use them, but given this is an old > platform then I understand if you want to maintain compatibility with > existing userspace. > > This is good to know! This is a "new" platform in the sense that we're finally upstreaming (even if we have been running it for 2 years on an older internal build). Also, this is going to be the basis for at least one additional TYAN board, so I'd like to get it "as right as possible" to avoid bad copy&paste. I was following the "standard" names from x86-power-control (https://github.com/openbmc/x86-power-control) so I had already renamed some of TYAN's original net names. With that, I'd be happy to rename all of the signals to follow the OpenBMC standard. Some questions on that, given that there are a few signals that don't have an obvious equivalent in the GPIO naming doc: - Some LEDs and outputs are _N-ed, i.e. active low. Is there a good way to indicate that? This is important, e.g. for "ALERT". - There are some signals that are inputs but are not buttons, e.g. "PLTRST_N". Also, this particular example is active low. - There are a bunch of output signals that control muxes, e.g. BMC_PE_SMB_EN_1_N. Is there a naming convention for those? Does it make sense for each OpenBMC signal to also indicate the original net name from the schematics. I realize that not many people have access to that, but it would be good for those who do. I'd rather document "too much" than too little. Thanks Oskar.
RESEND - this time in plain text. Sorry for the noise. Hey Joel Thank you so much for the super fast review! So many things have changed a bit since I worked on this DTS originally (years ago) - thanks for pointing me to the updates! I'll make the changes as recommended. > > +&gpio { > > + status = "okay"; > > + gpio-line-names = > > + /*A0-A7*/ "","","IDLED_N","","","","","", > > + /*B0-B7*/ "","","","","","","","", > > + /*C0-C7*/ "","","","","ID_BUTTON","POST_COMPLETE","","", > > + /*D0-D7*/ "","","PS_PWROK","PLTRST_N","","","","", > > + /*E0-E7*/ "POWER_BUTTON","POWER_OUT","RESET_BUTTON","RESET_OUT", > > + "NMI_BUTTON","NMI_OUT","","HEARTBEAT_LED_N", > > We have a document that contains names for common BMC GPIOs: > > https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md > > Ideally your device tree would use them, but given this is an old > platform then I understand if you want to maintain compatibility with > existing userspace. This is good to know! This is a "new" platform in the sense that we're finally upstreaming (even if we have been running it for 2 years on an older internal build). Also, this is going to be the basis for at least one additional TYAN board, so I'd like to get it "as right as possible" to avoid bad copy&paste. I was following the "standard" names from x86-power-control (https://github.com/openbmc/x86-power-control) so I had already renamed some of TYAN's original net names. With that, I'd be happy to rename all of the signals to follow the OpenBMC standard. Some questions on that, given that there are a few signals that don't have an obvious equivalent in the GPIO naming doc: - Some LEDs and outputs are _N-ed, i.e. active low. Is there a good way to indicate that? This is important, e.g. for "ALERT". - There are some signals that are inputs but are not buttons, e.g. "PLTRST_N". Also, this particular example is active low. - There are a bunch of output signals that control muxes, e.g. BMC_PE_SMB_EN_1_N. Is there a naming convention for those? Does it make sense for each OpenBMC signal to also indicate the original net name from the schematics. I realize that not many people have access to that, but it would be good for those who do. I'd rather document "too much" than too little. Thanks Oskar. On Tue, Sep 7, 2021 at 6:33 PM Joel Stanley <joel@jms.id.au> wrote: > > On Tue, 7 Sept 2021 at 19:49, Oskar Senft <osk@google.com> wrote: > > > > The TYAN S7106 is a server platform with an ASPEED AST2500 BMC. > > Looks good Oskar. Some minor improvements suggested below. > > I'll pull this in to the openbmc tree once it's looking good, so > there's no need to resend it separately in this case. > > Please do cc linux-arm-kernel@lists.infradead.org when submitting > patches upstream. > > > Signed-off-by: Oskar Senft <osk@google.com> > > --- > > arch/arm/boot/dts/aspeed-bmc-tyan-s7106.dts | 415 ++++++++++++++++++++ > > 1 file changed, 415 insertions(+) > > create mode 100644 arch/arm/boot/dts/aspeed-bmc-tyan-s7106.dts > > You need to add this to arch/arm/boot/dts/Makefile so it is built. > > > diff --git a/arch/arm/boot/dts/aspeed-bmc-tyan-s7106.dts b/arch/arm/boot/dts/aspeed-bmc-tyan-s7106.dts > > new file mode 100644 > > index 000000000000..292bfb1a4bb2 > > --- /dev/null > > +++ b/arch/arm/boot/dts/aspeed-bmc-tyan-s7106.dts > > @@ -0,0 +1,415 @@ > > +// SPDX-License-Identifier: GPL-2.0+ > > +/dts-v1/; > > + > > +#include "aspeed-g5.dtsi" > > +#include <dt-bindings/gpio/aspeed-gpio.h> > > + > > +/ { > > + model = "Tyan S7106 BMC"; > > + compatible = "tyan,s7106-bmc", "aspeed,ast2500"; > > + > > + chosen { > > + stdout-path = &uart5; > > + bootargs = "console=ttyS4,115200 earlyprintk"; > > s/earlyprintk/earlycon/ > > See 239566b032f3 ("ARM: dts: aspeed: Set earlycon boot argument") for > background. > > > + }; > > + > > + memory@80000000 { > > + device_type = "memory"; > > + reg = <0x80000000 0x20000000>; > > + }; > > + > > + reserved-memory { > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges; > > + > > + p2a_memory: region@987F0000 { > > I think we're standardising on lower case for hex numbers. > > > + no-map; > > + reg = <0x987F0000 0x00010000>; /* 64KB */ > > + }; > > + > > + vga_memory: framebuffer@9f000000 { > > + no-map; > > + reg = <0x9f000000 0x01000000>; /* 16M */ > > + }; > > + > > + gfx_memory: framebuffer { > > + size = <0x01000000>; /* 16M */ > > + alignment = <0x01000000>; > > + compatible = "shared-dma-pool"; > > + reusable; > > + }; > > + }; > > > +&mac0 { > > + status = "okay"; > > + > > + use-ncsi; > > + no-hw-checksum; > > Are you sure you need no-hw-checksum? > > Back in the day we disabled it when using ncsi on the ast2400, as we > thought it was broken when using NCSI. That was not the case: > > commit 6aff0bf641cf69e487d7b46fc8be773d161f814d > Author: Benjamin Herrenschmidt <benh@kernel.crashing.org> > Date: Wed Apr 12 13:27:03 2017 +1000 > > ftgmac100: Disable HW checksum generation on AST2400, enable on others > > We found out that HW checksum generation only works from AST2500 > onward. This disables it on AST2400 and removes the "no-hw-checksum" > properties in the device-trees. The problem we had wasn't related > to NC-SI. > > I suggest dropping the property. > > > + > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_rmii1_default>; > > +}; > > > +&kcs1 { > > + status = "okay"; > > + kcs_addr = <0xca8>; > > This style of kcs binding is deprecated. Instead we use this form: > > aspeed,lpc-io-reg = <0xca8>; > > > +}; > > + > > +&kcs3 { > > + status = "okay"; > > + kcs_addr = <0xca2>; > > +}; > > + > > +&gfx { > > + status = "okay"; > > + memory-region = <&gfx_memory>; > > This display device is for when the BMC is running to display it's own content. > > If the system is only showing the output from the host, then you don't > need this enabled. > > > +}; > > + > > +&gpio { > > + status = "okay"; > > + gpio-line-names = > > + /*A0-A7*/ "","","IDLED_N","","","","","", > > + /*B0-B7*/ "","","","","","","","", > > + /*C0-C7*/ "","","","","ID_BUTTON","POST_COMPLETE","","", > > + /*D0-D7*/ "","","PS_PWROK","PLTRST_N","","","","", > > + /*E0-E7*/ "POWER_BUTTON","POWER_OUT","RESET_BUTTON","RESET_OUT", > > + "NMI_BUTTON","NMI_OUT","","HEARTBEAT_LED_N", > > We have a document that contains names for common BMC GPIOs: > > https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md > > Ideally your device tree would use them, but given this is an old > platform then I understand if you want to maintain compatibility with > existing userspace. > > > + /*F0-F7*/ "","CLEAR_CMOS_N","","","IPMI_ALERT_LED_N","","","", > > + /*G0-G7*/ "BMC_PE_SMB_EN_1_N","BMC_PE_SMB_EN_2_N","","","","","","", > > + /*H0-H7*/ "","","","","","","","", > > + /*I0-I7*/ "","","","","","","","", > > + /*J0-J7*/ "","","","","","","","", > > + /*K0-K7*/ "","","","","","","","", > > + /*L0-L7*/ "","","","","","","","", > > + /*M0-M7*/ "","","","","","","","", > > + /*N0-N7*/ "","","","","","","","", > > + /*O0-O7*/ "","","","","","","","", > > + /*P0-P7*/ "","","","","","","","", > > + /*Q0-Q7*/ "","","","","BMC_PE_SMB_SW_BIT0","BMC_PE_SMB_SW_BIT1","","", > > + /*R0-R7*/ "","","","","","","","", > > + /*S0-S7*/ "","","","","","","","", > > + /*T0-T7*/ "","","","","","","","", > > + /*U0-U7*/ "","","","","","","","", > > + /*V0-V7*/ "","","","","","","","", > > + /*W0-W7*/ "","","","","","","","", > > + /*X0-X7*/ "","","","","","","","", > > + /*Y0-Y7*/ "","","","","","","","", > > + /*Z0-Z7*/ "","","","","","","","", > > + /*AA0-AA7*/ "","","","BMC_SMB3_PCH_IE_SML3_EN","","","","", > > + /*AB0-AB7*/ "","","","","","","",""; > > +}; > > -- > > 2.33.0.309.g3052b89438-goog > >
diff --git a/arch/arm/boot/dts/aspeed-bmc-tyan-s7106.dts b/arch/arm/boot/dts/aspeed-bmc-tyan-s7106.dts new file mode 100644 index 000000000000..292bfb1a4bb2 --- /dev/null +++ b/arch/arm/boot/dts/aspeed-bmc-tyan-s7106.dts @@ -0,0 +1,415 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +#include "aspeed-g5.dtsi" +#include <dt-bindings/gpio/aspeed-gpio.h> + +/ { + model = "Tyan S7106 BMC"; + compatible = "tyan,s7106-bmc", "aspeed,ast2500"; + + chosen { + stdout-path = &uart5; + bootargs = "console=ttyS4,115200 earlyprintk"; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + p2a_memory: region@987F0000 { + no-map; + reg = <0x987F0000 0x00010000>; /* 64KB */ + }; + + vga_memory: framebuffer@9f000000 { + no-map; + reg = <0x9f000000 0x01000000>; /* 16M */ + }; + + gfx_memory: framebuffer { + size = <0x01000000>; /* 16M */ + alignment = <0x01000000>; + compatible = "shared-dma-pool"; + reusable; + }; + }; + + leds { + compatible = "gpio-leds"; + + identify { + gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>; + }; + + heartbeat { + gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>; + }; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, + <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>, + <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>, + <&adc 12>, <&adc 13>, <&adc 14>; + }; + + iio-hwmon-battery { + compatible = "iio-hwmon"; + io-channels = <&adc 15>; + }; +}; + +&fmc { + status = "okay"; + flash@0 { + label = "bmc"; + status = "okay"; + m25p,fast-read; +#include "openbmc-flash-layout.dtsi" + }; +}; + +&spi1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1_default>; + + flash@0 { + status = "okay"; + label = "pnor"; + m25p,fast-read; + }; +}; + +&uart1 { + /* Rear RS-232 connector */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_txd1_default + &pinctrl_rxd1_default>; +}; + +&uart2 { + /* RS-232 connector on header */ + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_txd2_default + &pinctrl_rxd2_default>; +}; + +&uart3 { + /* Alternative to vuart to internally connect (route) to uart1 + * when vuart cannot be used due to BIOS limitations. + */ + status = "okay"; +}; + +&uart4 { + /* Alternative to vuart to internally connect (route) to the + * external port usually used by uart1 when vuart cannot be + * used due to BIOS limitations. + */ + status = "okay"; +}; + +&uart5 { + /* BMC "debug" (console) UART; connected to RS-232 connector + * on header; selectable via jumpers as alternative to uart2 + */ + status = "okay"; +}; + +&vuart { + status = "okay"; +}; + +&lpc_ctrl { + status = "okay"; +}; + +&p2a { + status = "okay"; + memory-region = <&p2a_memory>; +}; + +&lpc_snoop { + status = "okay"; + snoop-ports = <0x80>; +}; + +&adc { + status = "okay"; +}; + +&vhub { + status = "okay"; +}; + +&pwm_tacho { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_default + &pinctrl_pwm1_default + &pinctrl_pwm3_default + &pinctrl_pwm4_default>; + + /* CPU fan #0 */ + fan@0 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x00>; + }; + + /* CPU fan #1 */ + fan@1 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x01>; + }; + + /* PWM group for chassis fans #1, #2, #3 and #4 */ + fan@2 { + reg = <0x03>; + aspeed,fan-tach-ch = /bits/ 8 <0x02>; + }; + + fan@3 { + reg = <0x03>; + aspeed,fan-tach-ch = /bits/ 8 <0x03>; + }; + + fan@4 { + reg = <0x03>; + aspeed,fan-tach-ch = /bits/ 8 <0x04>; + }; + + fan@5 { + reg = <0x03>; + aspeed,fan-tach-ch = /bits/ 8 <0x05>; + }; + + /* PWM group for chassis fans #5 and #6 */ + fan@6 { + reg = <0x04>; + aspeed,fan-tach-ch = /bits/ 8 <0x06>; + }; + + fan@7 { + reg = <0x04>; + aspeed,fan-tach-ch = /bits/ 8 <0x07>; + }; +}; + +&i2c0 { + status = "okay"; + + /* Hardware monitor with temperature sensors */ + nct7802@28 { + compatible = "nuvoton,nct7802"; + reg = <0x28>; + }; + + /* Also connected to: + * - IPMB pin header + * - CPU #0 memory error LED @ 0x3A + * - CPU #1 memory error LED @ 0x3C + */ +}; + +&i2c1 { + /* Directly connected to PCH SMBUS #0 */ + status = "okay"; +}; + +&i2c2 { + status = "okay"; + + /* BMC EEPROM, incl. mainboard FRU */ + eeprom@50 { + compatible = "atmel,24c256"; + reg = <0x50>; + }; + + /* Also connected to: + * - fan header + * - mini-SAS HD connector + * - SSATA SGPIO + * - via switch (BMC_SMB3_PCH_IE_SML3_EN, active low) to PCH SMBUS #3 + */ +}; + +&i2c3 { + status = "okay"; + + /* PSU1 FRU @ 0xA0 */ + eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + }; + + /* PSU2 FRU @ 0xA2 */ + eeprom@51 { + compatible = "atmel,24c02"; + reg = <0x51>; + }; + + /* PSU1 @ 0xB0 */ + power-supply@58 { + compatible = "pmbus"; + reg = <0x58>; + }; + + /* PSU2 @ 0xB2 */ + power-supply@59 { + compatible = "pmbus"; + reg = <0x59>; + }; + + /* Also connected to: + * - PCH SMBUS #1 + */ +}; + +&i2c4 { + status = "okay"; + + /* Connected to: + * - PCH SMBUS #2 + */ + + /* Connected via switch to: + * - CPU #0 channels ABC VDDQ @ 0x80 + * - CPU #0 channels DEF VDDQ @ 0x81 + * - CPU #1 channels ABC VDDQ @ 0x82 + * - CPU #1 channels DEF VDDQ @ 0x83 + * - CPU #0 VCCIO & VMCP @ 0x52 + * - CPU #1 VCCIO & VMCP @ 0x53 + * - CPU #0 VCCIN @ 0xC0 + * - CPU #0 VSA @ 0xC2 + * - CPU #1 VCCIN @ 0xC4 + * - CPU #1 VSA @ 0xC6 + * - J110 + */ +}; + +&i2c5 { + status = "okay"; + + /* Connected via switch (PCH_BMC_SMB_SW_P) to: + * - mainboard FRU @ 0xAE + * - XDP connector + * - ME debug header + * - clock buffer @ 0xD8 + * - i2c4 via switch (PCH_VR_SMBUS_SW_P; controlled by PCH) + * - PCH SMBUS + */ +}; + +&i2c6 { + status = "okay"; + + /* Connected via switch (BMC_PE_SMB_EN_1_N) to + * bus mux (selector BMC_PE_SMB_SW_BIT[1..0]) to: + * - 0,0: PCIE slot 1, SMB #1 + * - 0,1: PCIE slot 1, SMB #2 + * - 1,0: PCIE slot 2, SMB #1 + * - 1,1: PCIE slot 2, SMB #2 + */ + + /* Connected via switch (BMC_PE_SMB_EN_2_N) to + * bus mux (selector BMC_PE_SMB_SW_BIT[1..0]) to: + * - 0,0: OCP0 (A) SMB + * - 0,1: OCP0 (C) SMB + * - 1,0: OCP1 (A) SMB + * - 1,1: NC + */ +}; + +&i2c7 { + status = "okay"; + + /* Connected to: + * - PCH SMBUS #4 + */ +}; + +&i2c8 { + status = "okay"; + + /* Not connected */ +}; + +&mac0 { + status = "okay"; + + use-ncsi; + no-hw-checksum; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii1_default>; +}; + +&mac1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; +}; + +&ibt { + status = "okay"; +}; + +&kcs1 { + status = "okay"; + kcs_addr = <0xca8>; +}; + +&kcs3 { + status = "okay"; + kcs_addr = <0xca2>; +}; + +&gfx { + status = "okay"; + memory-region = <&gfx_memory>; +}; + +&gpio { + status = "okay"; + gpio-line-names = + /*A0-A7*/ "","","IDLED_N","","","","","", + /*B0-B7*/ "","","","","","","","", + /*C0-C7*/ "","","","","ID_BUTTON","POST_COMPLETE","","", + /*D0-D7*/ "","","PS_PWROK","PLTRST_N","","","","", + /*E0-E7*/ "POWER_BUTTON","POWER_OUT","RESET_BUTTON","RESET_OUT", + "NMI_BUTTON","NMI_OUT","","HEARTBEAT_LED_N", + /*F0-F7*/ "","CLEAR_CMOS_N","","","IPMI_ALERT_LED_N","","","", + /*G0-G7*/ "BMC_PE_SMB_EN_1_N","BMC_PE_SMB_EN_2_N","","","","","","", + /*H0-H7*/ "","","","","","","","", + /*I0-I7*/ "","","","","","","","", + /*J0-J7*/ "","","","","","","","", + /*K0-K7*/ "","","","","","","","", + /*L0-L7*/ "","","","","","","","", + /*M0-M7*/ "","","","","","","","", + /*N0-N7*/ "","","","","","","","", + /*O0-O7*/ "","","","","","","","", + /*P0-P7*/ "","","","","","","","", + /*Q0-Q7*/ "","","","","BMC_PE_SMB_SW_BIT0","BMC_PE_SMB_SW_BIT1","","", + /*R0-R7*/ "","","","","","","","", + /*S0-S7*/ "","","","","","","","", + /*T0-T7*/ "","","","","","","","", + /*U0-U7*/ "","","","","","","","", + /*V0-V7*/ "","","","","","","","", + /*W0-W7*/ "","","","","","","","", + /*X0-X7*/ "","","","","","","","", + /*Y0-Y7*/ "","","","","","","","", + /*Z0-Z7*/ "","","","","","","","", + /*AA0-AA7*/ "","","","BMC_SMB3_PCH_IE_SML3_EN","","","","", + /*AB0-AB7*/ "","","","","","","",""; +};
The TYAN S7106 is a server platform with an ASPEED AST2500 BMC. Signed-off-by: Oskar Senft <osk@google.com> --- arch/arm/boot/dts/aspeed-bmc-tyan-s7106.dts | 415 ++++++++++++++++++++ 1 file changed, 415 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed-bmc-tyan-s7106.dts