diff mbox series

[3/3] ARM: dts: aspeed: Add silicon id node

Message ID 20200916084703.778386-4-joel@jms.id.au
State New
Headers show
Series ARM: aspeed: Add socinfo driver | expand

Commit Message

Joel Stanley Sept. 16, 2020, 8:47 a.m. UTC
This register describes the silicon id and chip unique id. It varies
between CPU revisions, but is always part of the SCU.

Signed-off-by: Joel Stanley <joel@jms.id.au>
---
 arch/arm/boot/dts/aspeed-g4.dtsi | 5 +++++
 arch/arm/boot/dts/aspeed-g5.dtsi | 5 +++++
 arch/arm/boot/dts/aspeed-g6.dtsi | 5 +++++
 3 files changed, 15 insertions(+)

Comments

Andrew Jeffery Sept. 16, 2020, 11:52 p.m. UTC | #1
On Wed, 16 Sep 2020, at 18:17, Joel Stanley wrote:
> This register describes the silicon id and chip unique id. It varies
> between CPU revisions, but is always part of the SCU.
> 
> Signed-off-by: Joel Stanley <joel@jms.id.au>
> ---
>  arch/arm/boot/dts/aspeed-g4.dtsi | 5 +++++
>  arch/arm/boot/dts/aspeed-g5.dtsi | 5 +++++
>  arch/arm/boot/dts/aspeed-g6.dtsi | 5 +++++
>  3 files changed, 15 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
> index 82f0213e3a3c..bc580b75f801 100644
> --- a/arch/arm/boot/dts/aspeed-g4.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi
> @@ -192,6 +192,11 @@ p2a: p2a-control@2c {
>  					status = "disabled";
>  				};
>  
> +                                silicon-id@7c {
> +                                        compatible = 
> "aspeed,ast2400-silicon-id", "aspeed,silicon-id";
> +					reg = <0x7c 0x4>;

Looks like a whitespace/alignment issue here.

> +                                };
> +
>  				pinctrl: pinctrl@80 {
>  					reg = <0x80 0x18>, <0xa0 0x10>;
>  					compatible = "aspeed,ast2400-pinctrl";
> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi 
> b/arch/arm/boot/dts/aspeed-g5.dtsi
> index 9c91afb2b404..c6862182313a 100644
> --- a/arch/arm/boot/dts/aspeed-g5.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
> @@ -239,6 +239,11 @@ p2a: p2a-control@2c {
>  					status = "disabled";
>  				};
>  
> +				silicon-id@7c {
> +					compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";
> +					reg = <0x7c 0x4 0x150 0x8>;

I think `reg = <0x7c 0x4>, <0x150 0x8>;` can be used here? I think it's a 
readability improvement, but I'm not fussed. If you decide to change it
then also fix the g6 devicetree.

Andrew


> +				};
> +
>  				pinctrl: pinctrl@80 {
>  					compatible = "aspeed,ast2500-pinctrl";
>  					reg = <0x80 0x18>, <0xa0 0x10>;
> diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
> index b58220a49cbd..1ce3a1f06f7f 100644
> --- a/arch/arm/boot/dts/aspeed-g6.dtsi
> +++ b/arch/arm/boot/dts/aspeed-g6.dtsi
> @@ -311,6 +311,11 @@ pinctrl: pinctrl {
>  					compatible = "aspeed,ast2600-pinctrl";
>  				};
>  
> +				silicon-id@14 {
> +					compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id";
> +					reg = <0x14 0x4 0x5b0 0x8>;
> +				};
> +
>  				smp-memram@180 {
>  					compatible = "aspeed,ast2600-smpmem";
>  					reg = <0x180 0x40>;
> -- 
> 2.28.0
> 
>
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 82f0213e3a3c..bc580b75f801 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -192,6 +192,11 @@  p2a: p2a-control@2c {
 					status = "disabled";
 				};
 
+                                silicon-id@7c {
+                                        compatible = "aspeed,ast2400-silicon-id", "aspeed,silicon-id";
+					reg = <0x7c 0x4>;
+                                };
+
 				pinctrl: pinctrl@80 {
 					reg = <0x80 0x18>, <0xa0 0x10>;
 					compatible = "aspeed,ast2400-pinctrl";
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 9c91afb2b404..c6862182313a 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -239,6 +239,11 @@  p2a: p2a-control@2c {
 					status = "disabled";
 				};
 
+				silicon-id@7c {
+					compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";
+					reg = <0x7c 0x4 0x150 0x8>;
+				};
+
 				pinctrl: pinctrl@80 {
 					compatible = "aspeed,ast2500-pinctrl";
 					reg = <0x80 0x18>, <0xa0 0x10>;
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index b58220a49cbd..1ce3a1f06f7f 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -311,6 +311,11 @@  pinctrl: pinctrl {
 					compatible = "aspeed,ast2600-pinctrl";
 				};
 
+				silicon-id@14 {
+					compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id";
+					reg = <0x14 0x4 0x5b0 0x8>;
+				};
+
 				smp-memram@180 {
 					compatible = "aspeed,ast2600-smpmem";
 					reg = <0x180 0x40>;