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[73.252.146.110]) by smtp.gmail.com with ESMTPSA id gn5sm3644742pjb.23.2020.07.23.16.05.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Jul 2020 16:05:51 -0700 (PDT) From: rentao.bupt@gmail.com To: Rob Herring , Joel Stanley , Andrew Jeffery , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, taoren@fb.com Subject: [PATCH v2 3/3] ARM: dts: aspeed: wedge40: enable pwm_tacho device Date: Thu, 23 Jul 2020 16:05:39 -0700 Message-Id: <20200723230539.17860-4-rentao.bupt@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200723230539.17860-1-rentao.bupt@gmail.com> References: <20200723230539.17860-1-rentao.bupt@gmail.com> X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" From: Tao Ren Enable pwm_tacho device for fan control and monitoring in Wedge40. Signed-off-by: Tao Ren --- Changes in v2: - Nothing changed. Resending the patch just in case the previous email was not delivered. .../boot/dts/aspeed-bmc-facebook-wedge40.dts | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-wedge40.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-wedge40.dts index 1049cfa80ac2..8ac23ff6b09e 100644 --- a/arch/arm/boot/dts/aspeed-bmc-facebook-wedge40.dts +++ b/arch/arm/boot/dts/aspeed-bmc-facebook-wedge40.dts @@ -135,3 +135,32 @@ &adc { status = "okay"; }; + +&pwm_tacho { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_default + &pinctrl_pwm1_default + &pinctrl_pwm6_default + &pinctrl_pwm7_default>; + + fan@0 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>; + }; + + fan@1 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>; + }; + + fan@6 { + reg = <0x06>; + aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>; + }; + + fan@7 { + reg = <0x07>; + aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>; + }; +};