From patchwork Tue Jul 21 12:00:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jet Li X-Patchwork-Id: 1335337 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4BCdNd648rz9sRN for ; Fri, 24 Jul 2020 15:41:21 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ibm.com Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4BCdNd5cgwzDsDx for ; Fri, 24 Jul 2020 15:41:21 +1000 (AEST) X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=softfail (domain owner discourages use of this host) smtp.mailfrom=ibm.com (client-ip=103.200.3.19; helo=segapp01.wistron.com; envelope-from=jet.le@ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=fail (p=none dis=none) header.from=ibm.com Received: from segapp01.wistron.com (segapp02.wistron.com [103.200.3.19]) by lists.ozlabs.org (Postfix) with ESMTP id 4B9xxm538TzDqnW for ; Tue, 21 Jul 2020 22:00:44 +1000 (AEST) Received: from EXCHAPP01.whq.wistron (unverified [10.37.38.24]) by TWNHUMSW2.wistron.com (Clearswift SMTPRS 5.6.0) with ESMTP id ; Tue, 21 Jul 2020 20:00:41 +0800 Received: from EXCHAPP01.whq.wistron (10.37.38.24) by EXCHAPP01.whq.wistron (10.37.38.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1913.5; Tue, 21 Jul 2020 20:00:41 +0800 Received: from gitserver.wistron.com (10.37.38.233) by EXCHAPP01.whq.wistron (10.37.38.24) with Microsoft SMTP Server id 15.1.1913.5 via Frontend Transport; Tue, 21 Jul 2020 20:00:41 +0800 From: Jet Li To: Joel Stanley , Andrew Jeffery , , , Subject: [PATCH linux dev-5.7 v1] ARM: dts: aspeed: rainier: Add I2c buses for nvme use Date: Tue, 21 Jul 2020 20:00:31 +0800 Message-ID: <20200721120031.27258-1-Jet.Le@ibm.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-TM-SNTS-SMTP: 3F6CD30736110E6CFCF9E7DF1BC98941578B327EDD47D86167E9D830534C39F12000:8 X-Mailman-Approved-At: Fri, 24 Jul 2020 15:41:07 +1000 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jet Li Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" From: Jet Li Adding pca9552 exposes the presence detect lines for the cards and tca9554 exposes the presence details for the cards. Signed-off-by: Jet Li --- arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 105 +++++++++++++++++++++++++++ 1 file changed, 105 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts index 1ae119a..76a7e82 100644 --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts @@ -248,6 +248,21 @@ compatible = "atmel,24c64"; reg = <0x51>; }; + + tca9554@40 { + compatible = "ti,tca9554"; + reg = <0x40>; + gpio-controller; + #gpio-cells = <2>; + + smbus0 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "smbus0"; + }; + }; + }; &i2c1 { @@ -562,6 +577,96 @@ compatible = "atmel,24c64"; reg = <0x51>; }; + + pca1: pca9552@61 { + compatible = "nxp,pca9552"; + reg = <0x61>; + #address-cells = <1>; + #size-cells = <0>; + gpio-controller; + #gpio-cells = <2>; + + gpio@0 { + reg = <0>; + type = ; + }; + + gpio@1 { + reg = <1>; + type = ; + }; + + gpio@2 { + reg = <2>; + type = ; + }; + + gpio@3 { + reg = <3>; + type = ; + }; + + gpio@4 { + reg = <4>; + type = ; + }; + + gpio@5 { + reg = <5>; + type = ; + }; + + gpio@6 { + reg = <6>; + type = ; + }; + + gpio@7 { + reg = <7>; + type = ; + }; + + gpio@8 { + reg = <8>; + type = ; + }; + + gpio@9 { + reg = <9>; + type = ; + }; + + gpio@10 { + reg = <10>; + type = ; + }; + + gpio@11 { + reg = <11>; + type = ; + }; + + gpio@12 { + reg = <12>; + type = ; + }; + + gpio@13 { + reg = <13>; + type = ; + }; + + gpio@14 { + reg = <14>; + type = ; + }; + + gpio@15 { + reg = <15>; + type = ; + }; + }; + }; &i2c9 {