From patchwork Fri Jun 5 10:06:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Pai X-Patchwork-Id: 1304029 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49ddbD18Vdz9sRR for ; Fri, 5 Jun 2020 20:06:32 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=wistron.com Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49ddbD0LMnzDqxH for ; Fri, 5 Jun 2020 20:06:32 +1000 (AEST) X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=wistron.com (client-ip=103.200.3.19; helo=segapp03.wistron.com; envelope-from=ben_pai@wistron.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=wistron.com Received: from segapp03.wistron.com (segapp02.wistron.com [103.200.3.19]) by lists.ozlabs.org (Postfix) with ESMTP id 49ddb348WVzDqdL for ; Fri, 5 Jun 2020 20:06:21 +1000 (AEST) Received: from EXCHAPP02.whq.wistron (unverified [10.37.38.25]) by TWNHUMSW4.wistron.com (Clearswift SMTPRS 5.6.0) with ESMTP id ; Fri, 5 Jun 2020 18:06:18 +0800 Received: from EXCHAPP03.whq.wistron (10.37.38.26) by EXCHAPP02.whq.wistron (10.37.38.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1913.5; Fri, 5 Jun 2020 18:06:17 +0800 Received: from gitserver.wistron.com (10.37.38.233) by EXCHAPP03.whq.wistron (10.37.38.26) with Microsoft SMTP Server id 15.1.1913.5 via Frontend Transport; Fri, 5 Jun 2020 18:06:17 +0800 From: Ben Pai To: , , , , Subject: [PATCH v1 1/2] ARM: dts: aspeed: mihawk: IO expander uses TCA9554 driver Date: Fri, 5 Jun 2020 18:06:14 +0800 Message-ID: <20200605100614.14726-1-Ben_Pai@wistron.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-TM-SNTS-SMTP: 046AADC4E7378F668BD1404E8B899BEBBB327568BE24F0CF5C33F311765E568B2000:8 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ben Pai , claire_ku@wistron.com Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" Set smbus_en of IO expander to 1 in order to be able to read sensor. Signed-off-by: Ben Pai --- arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts | 112 ++++++++++++++++++++ 1 file changed, 112 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts b/arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts index eac6ed2bbc67..25ffe65fbdc0 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts @@ -820,12 +820,40 @@ #address-cells = <1>; #size-cells = <0>; reg = <0>; + + tca9554@39 { + compatible = "ti,tca9554"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + + smbus0 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "smbus0"; + }; + }; }; bus9_mux232: i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; + + tca9554@39 { + compatible = "ti,tca9554"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + + smbus1 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "smbus1"; + }; + }; }; bus9_mux233: i2c@2 { @@ -855,12 +883,40 @@ #address-cells = <1>; #size-cells = <0>; reg = <0>; + + tca9554@39 { + compatible = "ti,tca9554"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + + smbus2 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "smbus2"; + }; + }; }; bus9_mux236: i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; + + tca9554@39 { + compatible = "ti,tca9554"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + + smbus3 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "smbus3"; + }; + }; }; bus9_mux237: i2c@2 { @@ -909,12 +965,40 @@ #address-cells = <1>; #size-cells = <0>; reg = <0>; + + tca9554@39 { + compatible = "ti,tca9554"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + + smbus4 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "smbus4"; + }; + }; }; bus10_mux240: i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; + + tca9554@39 { + compatible = "ti,tca9554"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + + smbus5 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "smbus5"; + }; + }; }; bus10_mux241: i2c@2 { @@ -944,12 +1028,40 @@ #address-cells = <1>; #size-cells = <0>; reg = <0>; + + tca9554@39 { + compatible = "ti,tca9554"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + + smbus6 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "smbus6"; + }; + }; }; bus10_mux244: i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; + + tca9554@39 { + compatible = "ti,tca9554"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + + smbus7 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "smbus7"; + }; + }; }; bus10_mux245: i2c@2 {