From patchwork Tue Apr 16 16:21:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick Venture X-Patchwork-Id: 1086423 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44k9mj4KJrz9s4Y for ; Wed, 17 Apr 2019 02:29:09 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=google.com header.i=@google.com header.b="jtONVZGF"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 44k9mj35X0zDqDT for ; Wed, 17 Apr 2019 02:29:09 +1000 (AEST) X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=flex--venture.bounces.google.com (client-ip=2607:f8b0:4864:20::84a; helo=mail-qt1-x84a.google.com; envelope-from=3rgg2xackda08r0674rt11tyr.p1zyv07a-n52rrqyv565.1cyno5.14t@flex--venture.bounces.google.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=google.com header.i=@google.com header.b="jtONVZGF"; dkim-atps=neutral Received: from mail-qt1-x84a.google.com (mail-qt1-x84a.google.com [IPv6:2607:f8b0:4864:20::84a]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 44k9dC4XyyzDqG1 for ; Wed, 17 Apr 2019 02:22:33 +1000 (AEST) Received: by mail-qt1-x84a.google.com with SMTP id f89so19952188qtb.4 for ; Tue, 16 Apr 2019 09:22:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=NPvt7sSc1zkwaIBM5xgspuUUhdwpA/3SPScemFlYhns=; b=jtONVZGF4KZMsUVDVYcda4XXt6HI9EaWwWmnwfamxSnbgCRlY3WucXsN6EMdatspZE J4t1Sxd8Ptj70SNoEHyH0Fdlrqz8WaEq9BiYiWKNBAeWjKA8TlvLu5zM/W8Iu/rT33aI KmBSunX9M15SdKdBLiE3yvK+rb6qwbErHwYzW2P3ItZ+2+m63acWoeg0yAuWBkoiuif1 k/wmW10+1zdQCArjIh6ED0W1HthShY/wE0ksFsthJnOtVCQIL6KP0FMgKRVNCOXIvCde ebK96VjpH+6YhaTa0aXdXjvMWW8c7tkFaReVcQK98b5Zq2/iuCAMTrJGd3Ae0pLFs61A RuvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=NPvt7sSc1zkwaIBM5xgspuUUhdwpA/3SPScemFlYhns=; b=kKyiqcZuq9ROvuW/tYBAPaFm+72OlctDQMdPoSXUxsVjIIO31vuBtZ5+H7AxNX36b3 8FPcBxZIE/0vx4xAxmgHW3wnqHv26Jok0BYr07eig2voJ/00POs3a9q2IWcTpGNOrYx/ pvbwZGe820xrwwezQyvIMJWEU3bYHH6k7HgQzqJ/WAOofBkaM4/eq28WTkR5H94xJv+Z ac349rgWqsHSxRC+cOeAsbtZoDSDLfKXlyF9gBeS8sG+9bnkrbuxvSkmtnemKLIB+mh8 Un+ZRY43vezF0wz44rVhMsi+0IF5qU3sc9DY1+vaU2zmzfnab918kbL3EBlQyKcn8Tn+ IdLg== X-Gm-Message-State: APjAAAUWPxNgLQ+QHxFIPONS4ea12oVVV772zkzdqdsUWWpxVFuvgoLf ccjrHlhelWEaQ2d+2GBvyQjSaDX4lFIW X-Google-Smtp-Source: APXvYqz+p5jCEMyb5mCcnWCNrEdWPEIyNNVj/k1CwiFs3mip0KTJ/sOAQw4McYUj84e4RcEeyqtqXORwSDJz X-Received: by 2002:ac8:8d4:: with SMTP id y20mr66951267qth.13.1555431750915; Tue, 16 Apr 2019 09:22:30 -0700 (PDT) Date: Tue, 16 Apr 2019 09:21:51 -0700 In-Reply-To: <20190416162150.150154-1-venture@google.com> Message-Id: <20190416162150.150154-4-venture@google.com> Mime-Version: 1.0 References: <20190416162150.150154-1-venture@google.com> X-Mailer: git-send-email 2.21.0.392.gf8f6787159e-goog Subject: [PATCH 3/3] ARM: dts: aspeed: zaius: fixed I2C bus numbers for pcie slots From: Patrick Venture To: venture@google.com, robh+dt@kernel.org, mark.rutland@arm.com, joel@jms.id.au, andrew@aj.id.au X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Robert Lippert , linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" From: Robert Lippert The change to include ibm-power9-cfam.dtsi resulted in a renumbering of all of the I2C bus numbers behind the on-board muxes. This breaks some tools which have hardcoded the bus numbers. Add device tree aliases for the I2C buses routed through the PCIe slots so that they return to their former numbers before the cfam change. Signed-off-by: Robert Lippert Signed-off-by: Patrick Venture --- arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 40 ++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts index 51265af622574..c12f89e042efc 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts @@ -7,6 +7,14 @@ model = "Zaius BMC"; compatible = "ingrasys,zaius-bmc", "aspeed,ast2500"; + aliases { + i2c15 = &i2cpcie0; + i2c16 = &i2cpcie1; + i2c17 = &i2cpcie2; + i2c19 = &i2cpcie3; + i2c20 = &i2cpcie4; + }; + chosen { stdout-path = &uart5; bootargs = "console=ttyS4,115200 earlyprintk"; @@ -223,6 +231,27 @@ reg = <0x71>; #address-cells = <1>; #size-cells = <0>; + + i2cpcie0: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + i2cpcie1: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + i2cpcie2: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + i2ctpm: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; }; /* MUX1 PCA9546A @71h @@ -253,6 +282,17 @@ reg = <0x71>; #address-cells = <1>; #size-cells = <0>; + + i2cpcie3: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + i2cpcie4: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; }; /* MUX1 PCA9546A @71h